336 lines
8.8 KiB
C
336 lines
8.8 KiB
C
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/*
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* Qualcomm PM8XXX Multi-Purpose Pin (MPP) driver
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*
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* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/mfd/pm8xxx/core.h>
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#include <linux/mfd/pm8xxx/mpp.h>
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/* MPP Type */
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#define PM8XXX_MPP_TYPE_MASK 0xE0
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#define PM8XXX_MPP_TYPE_SHIFT 5
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/* MPP Config Level */
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#define PM8XXX_MPP_CONFIG_LVL_MASK 0x1C
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#define PM8XXX_MPP_CONFIG_LVL_SHIFT 2
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/* MPP Config Control */
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#define PM8XXX_MPP_CONFIG_CTRL_MASK 0x03
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#define PM8XXX_MPP_CONFIG_CTRL_SHIFT 0
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struct pm8xxx_mpp_chip {
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struct list_head link;
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struct gpio_chip gpio_chip;
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spinlock_t pm_lock;
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u8 *ctrl_reg;
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int mpp_base;
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int irq_base;
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int nmpps;
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u16 base_addr;
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};
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static LIST_HEAD(pm8xxx_mpp_chips);
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static DEFINE_MUTEX(pm8xxx_mpp_chips_lock);
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static int pm8xxx_mpp_write(struct pm8xxx_mpp_chip *mpp_chip, u16 offset,
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u8 val, u8 mask)
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{
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u8 reg;
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int rc;
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unsigned long flags;
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spin_lock_irqsave(&mpp_chip->pm_lock, flags);
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reg = (mpp_chip->ctrl_reg[offset] & ~mask) | (val & mask);
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rc = pm8xxx_writeb(mpp_chip->gpio_chip.dev->parent,
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mpp_chip->base_addr + offset, reg);
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if (!rc)
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mpp_chip->ctrl_reg[offset] = reg;
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spin_unlock_irqrestore(&mpp_chip->pm_lock, flags);
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return rc;
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}
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static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct pm8xxx_mpp_chip *mpp_chip = dev_get_drvdata(chip->dev);
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return mpp_chip->irq_base + offset;
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}
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static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
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{
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struct pm8xxx_mpp_chip *mpp_chip = dev_get_drvdata(chip->dev);
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int rc;
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if ((mpp_chip->ctrl_reg[offset] & PM8XXX_MPP_TYPE_MASK) >>
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PM8XXX_MPP_TYPE_SHIFT == PM8XXX_MPP_TYPE_D_OUTPUT)
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rc = mpp_chip->ctrl_reg[offset] & PM8XXX_MPP_CONFIG_CTRL_MASK;
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else
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rc = pm8xxx_read_irq_stat(mpp_chip->gpio_chip.dev->parent,
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mpp_chip->irq_base + offset);
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return rc;
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}
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static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int val)
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{
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struct pm8xxx_mpp_chip *mpp_chip = dev_get_drvdata(chip->dev);
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u8 reg = val ? PM8XXX_MPP_DOUT_CTRL_HIGH : PM8XXX_MPP_DOUT_CTRL_LOW;
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int rc;
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rc = pm8xxx_mpp_write(mpp_chip, offset, reg,
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PM8XXX_MPP_CONFIG_CTRL_MASK);
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if (rc)
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pr_err("pm8xxx_mpp_write(): rc=%d\n", rc);
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}
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static int pm8xxx_mpp_dir_input(struct gpio_chip *chip, unsigned offset)
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{
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struct pm8xxx_mpp_chip *mpp_chip = dev_get_drvdata(chip->dev);
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int rc = pm8xxx_mpp_write(mpp_chip, offset,
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PM8XXX_MPP_TYPE_D_INPUT << PM8XXX_MPP_TYPE_SHIFT,
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PM8XXX_MPP_TYPE_MASK);
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if (rc)
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pr_err("pm8xxx_mpp_write(): rc=%d\n", rc);
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return rc;
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}
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static int pm8xxx_mpp_dir_output(struct gpio_chip *chip,
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unsigned offset, int val)
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{
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struct pm8xxx_mpp_chip *mpp_chip = dev_get_drvdata(chip->dev);
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u8 reg = (PM8XXX_MPP_TYPE_D_OUTPUT << PM8XXX_MPP_TYPE_SHIFT) |
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(val & PM8XXX_MPP_CONFIG_CTRL_MASK);
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u8 mask = PM8XXX_MPP_TYPE_MASK | PM8XXX_MPP_CONFIG_CTRL_MASK;
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int rc = pm8xxx_mpp_write(mpp_chip, offset, reg, mask);
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if (rc)
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pr_err("pm8xxx_mpp_write(): rc=%d\n", rc);
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return rc;
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}
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static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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{
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static const char * const ctype[] = { "d_in", "d_out", "bi_dir",
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"a_in", "a_out", "sink",
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"dtest_sink", "dtest_out"
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};
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struct pm8xxx_mpp_chip *mpp_chip = dev_get_drvdata(chip->dev);
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u8 type, state;
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const char *label;
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int i;
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for (i = 0; i < mpp_chip->nmpps; i++) {
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label = gpiochip_is_requested(chip, i);
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type = (mpp_chip->ctrl_reg[i] & PM8XXX_MPP_TYPE_MASK) >>
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PM8XXX_MPP_TYPE_SHIFT;
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state = pm8xxx_mpp_get(chip, i);
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seq_printf(s, "gpio-%-3d (%-12.12s) %-10.10s"
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" %s 0x%02x\n",
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chip->base + i,
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label ? label : "--",
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ctype[type],
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state ? "hi" : "lo",
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mpp_chip->ctrl_reg[i]);
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}
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}
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int pm8xxx_mpp_config(unsigned mpp, struct pm8xxx_mpp_config_data *config)
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{
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struct pm8xxx_mpp_chip *mpp_chip;
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int rc, found = 0;
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u8 config_reg, mask;
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if (!config) {
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pr_err("config not specified for MPP %d\n", mpp);
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return -EINVAL;
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}
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mutex_lock(&pm8xxx_mpp_chips_lock);
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list_for_each_entry(mpp_chip, &pm8xxx_mpp_chips, link) {
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if (mpp >= mpp_chip->mpp_base
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&& mpp < mpp_chip->mpp_base + mpp_chip->nmpps) {
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found = 1;
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break;
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}
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}
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mutex_unlock(&pm8xxx_mpp_chips_lock);
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if (!found) {
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pr_err("called on mpp %d not handled by any pmic\n", mpp);
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return -EINVAL;
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}
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mask = PM8XXX_MPP_TYPE_MASK | PM8XXX_MPP_CONFIG_LVL_MASK |
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PM8XXX_MPP_CONFIG_CTRL_MASK;
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config_reg = (config->type << PM8XXX_MPP_TYPE_SHIFT)
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& PM8XXX_MPP_TYPE_MASK;
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config_reg |= (config->level << PM8XXX_MPP_CONFIG_LVL_SHIFT)
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& PM8XXX_MPP_CONFIG_LVL_MASK;
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config_reg |= config->control & PM8XXX_MPP_CONFIG_CTRL_MASK;
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rc = pm8xxx_mpp_write(mpp_chip, mpp - mpp_chip->mpp_base, config_reg,
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mask);
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if (rc)
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pr_err("pm8xxx_mpp_write(): rc=%d\n", rc);
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return rc;
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}
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EXPORT_SYMBOL_GPL(pm8xxx_mpp_config);
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static int __devinit pm8xxx_mpp_reg_init(struct pm8xxx_mpp_chip *mpp_chip)
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{
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int rc, i;
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for (i = 0; i < mpp_chip->nmpps; i++) {
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rc = pm8xxx_readb(mpp_chip->gpio_chip.dev->parent,
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mpp_chip->base_addr + i,
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&mpp_chip->ctrl_reg[i]);
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if (rc) {
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pr_err("failed to read register 0x%x rc=%d\n",
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mpp_chip->base_addr + i, rc);
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return rc;
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}
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}
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return 0;
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}
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static int __devinit pm8xxx_mpp_probe(struct platform_device *pdev)
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{
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int rc;
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const struct pm8xxx_mpp_platform_data *pdata = pdev->dev.platform_data;
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struct pm8xxx_mpp_chip *mpp_chip;
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if (!pdata) {
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pr_err("missing platform data\n");
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return -EINVAL;
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}
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mpp_chip = kzalloc(sizeof(struct pm8xxx_mpp_chip), GFP_KERNEL);
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if (!mpp_chip) {
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pr_err("Cannot allocate %d bytes\n",
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sizeof(struct pm8xxx_mpp_chip));
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return -ENOMEM;
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}
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mpp_chip->ctrl_reg = kzalloc(pdata->core_data.nmpps, GFP_KERNEL);
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if (!mpp_chip->ctrl_reg) {
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pr_err("Cannot allocate %d bytes\n", pdata->core_data.nmpps);
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rc = -ENOMEM;
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goto free_mpp_chip;
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}
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spin_lock_init(&mpp_chip->pm_lock);
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mpp_chip->gpio_chip.label = PM8XXX_MPP_DEV_NAME;
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mpp_chip->gpio_chip.direction_input = pm8xxx_mpp_dir_input;
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mpp_chip->gpio_chip.direction_output = pm8xxx_mpp_dir_output;
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mpp_chip->gpio_chip.to_irq = pm8xxx_mpp_to_irq;
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mpp_chip->gpio_chip.get = pm8xxx_mpp_get;
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mpp_chip->gpio_chip.set = pm8xxx_mpp_set;
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mpp_chip->gpio_chip.dbg_show = pm8xxx_mpp_dbg_show;
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mpp_chip->gpio_chip.ngpio = pdata->core_data.nmpps;
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mpp_chip->gpio_chip.can_sleep = 0;
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mpp_chip->gpio_chip.dev = &pdev->dev;
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mpp_chip->gpio_chip.base = pdata->mpp_base;
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mpp_chip->irq_base = platform_get_irq(pdev, 0);
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mpp_chip->mpp_base = pdata->mpp_base;
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mpp_chip->base_addr = pdata->core_data.base_addr;
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mpp_chip->nmpps = pdata->core_data.nmpps;
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mutex_lock(&pm8xxx_mpp_chips_lock);
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list_add(&mpp_chip->link, &pm8xxx_mpp_chips);
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mutex_unlock(&pm8xxx_mpp_chips_lock);
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platform_set_drvdata(pdev, mpp_chip);
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rc = gpiochip_add(&mpp_chip->gpio_chip);
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if (rc) {
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pr_err("gpiochip_add failed, rc=%d\n", rc);
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goto reset_drvdata;
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}
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rc = pm8xxx_mpp_reg_init(mpp_chip);
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if (rc) {
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pr_err("failed to read MPP ctrl registers, rc=%d\n", rc);
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goto remove_chip;
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}
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pr_info("OK: base=%d, ngpio=%d\n", mpp_chip->gpio_chip.base,
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mpp_chip->gpio_chip.ngpio);
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return 0;
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remove_chip:
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if (gpiochip_remove(&mpp_chip->gpio_chip))
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pr_err("failed to remove gpio chip\n");
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reset_drvdata:
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platform_set_drvdata(pdev, NULL);
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free_mpp_chip:
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kfree(mpp_chip);
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return rc;
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}
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static int __devexit pm8xxx_mpp_remove(struct platform_device *pdev)
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{
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struct pm8xxx_mpp_chip *mpp_chip = platform_get_drvdata(pdev);
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mutex_lock(&pm8xxx_mpp_chips_lock);
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list_del(&mpp_chip->link);
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mutex_unlock(&pm8xxx_mpp_chips_lock);
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platform_set_drvdata(pdev, NULL);
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if (gpiochip_remove(&mpp_chip->gpio_chip))
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pr_err("failed to remove gpio chip\n");
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kfree(mpp_chip->ctrl_reg);
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kfree(mpp_chip);
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return 0;
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}
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static struct platform_driver pm8xxx_mpp_driver = {
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.probe = pm8xxx_mpp_probe,
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.remove = __devexit_p(pm8xxx_mpp_remove),
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.driver = {
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.name = PM8XXX_MPP_DEV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init pm8xxx_mpp_init(void)
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{
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return platform_driver_register(&pm8xxx_mpp_driver);
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}
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postcore_initcall(pm8xxx_mpp_init);
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static void __exit pm8xxx_mpp_exit(void)
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{
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platform_driver_unregister(&pm8xxx_mpp_driver);
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}
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module_exit(pm8xxx_mpp_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("PM8XXX MPP driver");
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MODULE_VERSION("1.0");
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MODULE_ALIAS("platform:" PM8XXX_MPP_DEV_NAME);
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