115 lines
3.2 KiB
C
115 lines
3.2 KiB
C
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/*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* The MSM peripherals are spread all over across 768MB of physical
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* space, which makes just having a simple IO_ADDRESS macro to slide
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* them into the right virtual location rough. Instead, we will
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* provide a master phys->virt mapping for peripherals here.
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*
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*/
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#ifndef __ASM_ARCH_MSM_IOMAP_8064_H
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#define __ASM_ARCH_MSM_IOMAP_8064_H
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/* Physical base address and size of peripherals.
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* Ordered by the virtual base addresses they will be mapped at.
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*
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* If you add or remove entries here, you'll want to edit the
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* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
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* changes.
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*
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*/
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#define APQ8064_TMR_PHYS 0x0200A000
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#define APQ8064_TMR_SIZE SZ_4K
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#define APQ8064_TMR0_PHYS 0x0208A000
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#define APQ8064_TMR0_SIZE SZ_4K
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#define APQ8064_QGIC_DIST_PHYS 0x02000000
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#define APQ8064_QGIC_DIST_SIZE SZ_4K
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#define APQ8064_QGIC_CPU_PHYS 0x02002000
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#define APQ8064_QGIC_CPU_SIZE SZ_4K
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#define APQ8064_TLMM_PHYS 0x00800000
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#define APQ8064_TLMM_SIZE SZ_16K
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#define APQ8064_ACC0_PHYS 0x02088000
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#define APQ8064_ACC0_SIZE SZ_4K
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#define APQ8064_ACC1_PHYS 0x02098000
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#define APQ8064_ACC1_SIZE SZ_4K
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#define APQ8064_ACC2_PHYS 0x020A8000
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#define APQ8064_ACC2_SIZE SZ_4K
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#define APQ8064_ACC3_PHYS 0x020B8000
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#define APQ8064_ACC3_SIZE SZ_4K
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#define APQ8064_APCS_GCC_PHYS 0x02011000
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#define APQ8064_APCS_GCC_SIZE SZ_4K
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#define APQ8064_CLK_CTL_PHYS 0x00900000
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#define APQ8064_CLK_CTL_SIZE SZ_16K
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#define APQ8064_MMSS_CLK_CTL_PHYS 0x04000000
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#define APQ8064_MMSS_CLK_CTL_SIZE SZ_4K
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#define APQ8064_LPASS_CLK_CTL_PHYS 0x28000000
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#define APQ8064_LPASS_CLK_CTL_SIZE SZ_4K
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#define APQ8064_HFPLL_PHYS 0x00903000
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#define APQ8064_HFPLL_SIZE SZ_4K
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#define APQ8064_IMEM_PHYS 0x2A03F000
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#define APQ8064_IMEM_SIZE SZ_4K
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#define APQ8064_RPM_PHYS 0x00108000
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#define APQ8064_RPM_SIZE SZ_4K
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#define APQ8064_RPM_MPM_PHYS 0x00200000
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#define APQ8064_RPM_MPM_SIZE SZ_4K
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#define APQ8064_SAW0_PHYS 0x02089000
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#define APQ8064_SAW0_SIZE SZ_4K
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#define APQ8064_SAW1_PHYS 0x02099000
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#define APQ8064_SAW1_SIZE SZ_4K
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#define APQ8064_SAW2_PHYS 0x020A9000
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#define APQ8064_SAW2_SIZE SZ_4K
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#define APQ8064_SAW3_PHYS 0x020B9000
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#define APQ8064_SAW3_SIZE SZ_4K
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#define APQ8064_SAW_L2_PHYS 0x02012000
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#define APQ8064_SAW_L2_SIZE SZ_4K
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#define APQ8064_QFPROM_PHYS 0x00700000
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#define APQ8064_QFPROM_SIZE SZ_4K
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#define APQ8064_SIC_NON_SECURE_PHYS 0x12100000
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#define APQ8064_SIC_NON_SECURE_SIZE SZ_64K
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#define APQ8064_HDMI_PHYS 0x04A00000
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#define APQ8064_HDMI_SIZE SZ_4K
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#ifdef CONFIG_DEBUG_APQ8064_UART
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#define MSM_DEBUG_UART_BASE IOMEM(0xFA740000)
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#define MSM_DEBUG_UART_PHYS 0x16640000
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#endif
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#endif
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