77 lines
2.4 KiB
ArmAsm
77 lines
2.4 KiB
ArmAsm
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/*****************************************************************************
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* Copyright 2006 - 2008 Broadcom Corporation. All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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/*
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*
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* Low-level IRQ helper macros for BCMRing-based platforms
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*
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*/
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#include <mach/irqs.h>
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#include <mach/hardware.h>
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#include <mach/csp/mm_io.h>
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =(MM_IO_BASE_INTC0)
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ldr \irqstat, [\base, #0] @ get status
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ldr \irqnr, [\base, #0x10] @ mask with enable register
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ands \irqstat, \irqstat, \irqnr
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mov \irqnr, #IRQ_INTC0_START
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cmp \irqstat, #0
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bne 1001f
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ldr \base, =(MM_IO_BASE_INTC1)
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ldr \irqstat, [\base, #0] @ get status
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ldr \irqnr, [\base, #0x10] @ mask with enable register
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ands \irqstat, \irqstat, \irqnr
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mov \irqnr, #IRQ_INTC1_START
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cmp \irqstat, #0
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bne 1001f
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ldr \base, =(MM_IO_BASE_SINTC)
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ldr \irqstat, [\base, #0] @ get status
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ldr \irqnr, [\base, #0x10] @ mask with enable register
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ands \irqstat, \irqstat, \irqnr
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mov \irqnr, #0xffffffff @ code meaning no interrupt bits set
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cmp \irqstat, #0
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beq 1002f
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mov \irqnr, #IRQ_SINTC_START @ something is set, so fixup return value
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1001:
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movs \tmp, \irqstat, lsl #16
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #16
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movs \tmp, \irqstat, lsl #8
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #8
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movs \tmp, \irqstat, lsl #4
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #4
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movs \tmp, \irqstat, lsl #2
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movne \irqstat, \tmp
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addeq \irqnr, \irqnr, #2
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movs \tmp, \irqstat, lsl #1
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addeq \irqnr, \irqnr, #1
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orrs \base, \base, #1
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1002: @ irqnr will be set to 0xffffffff if no irq bits are set
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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