319 lines
8.1 KiB
C
319 lines
8.1 KiB
C
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/*
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* Shared Atheros AR9170 Header
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*
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* Firmware command interface definitions
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*
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* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
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* Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, see
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* http://www.gnu.org/licenses/.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* Copyright (c) 2007-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __CARL9170_SHARED_FWCMD_H
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#define __CARL9170_SHARED_FWCMD_H
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#define CARL9170_MAX_CMD_LEN 64
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#define CARL9170_MAX_CMD_PAYLOAD_LEN 60
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#define CARL9170FW_API_MIN_VER 1
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#define CARL9170FW_API_MAX_VER 1
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enum carl9170_cmd_oids {
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CARL9170_CMD_RREG = 0x00,
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CARL9170_CMD_WREG = 0x01,
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CARL9170_CMD_ECHO = 0x02,
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CARL9170_CMD_SWRST = 0x03,
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CARL9170_CMD_REBOOT = 0x04,
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CARL9170_CMD_BCN_CTRL = 0x05,
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CARL9170_CMD_READ_TSF = 0x06,
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CARL9170_CMD_RX_FILTER = 0x07,
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CARL9170_CMD_WOL = 0x08,
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CARL9170_CMD_TALLY = 0x09,
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/* CAM */
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CARL9170_CMD_EKEY = 0x10,
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CARL9170_CMD_DKEY = 0x11,
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/* RF / PHY */
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CARL9170_CMD_FREQUENCY = 0x20,
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CARL9170_CMD_RF_INIT = 0x21,
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CARL9170_CMD_SYNTH = 0x22,
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CARL9170_CMD_FREQ_START = 0x23,
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CARL9170_CMD_PSM = 0x24,
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/* Asychronous command flag */
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CARL9170_CMD_ASYNC_FLAG = 0x40,
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CARL9170_CMD_WREG_ASYNC = (CARL9170_CMD_WREG |
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CARL9170_CMD_ASYNC_FLAG),
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CARL9170_CMD_REBOOT_ASYNC = (CARL9170_CMD_REBOOT |
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CARL9170_CMD_ASYNC_FLAG),
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CARL9170_CMD_BCN_CTRL_ASYNC = (CARL9170_CMD_BCN_CTRL |
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CARL9170_CMD_ASYNC_FLAG),
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CARL9170_CMD_PSM_ASYNC = (CARL9170_CMD_PSM |
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CARL9170_CMD_ASYNC_FLAG),
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/* responses and traps */
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CARL9170_RSP_FLAG = 0xc0,
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CARL9170_RSP_PRETBTT = 0xc0,
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CARL9170_RSP_TXCOMP = 0xc1,
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CARL9170_RSP_BEACON_CONFIG = 0xc2,
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CARL9170_RSP_ATIM = 0xc3,
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CARL9170_RSP_WATCHDOG = 0xc6,
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CARL9170_RSP_TEXT = 0xca,
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CARL9170_RSP_HEXDUMP = 0xcc,
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CARL9170_RSP_RADAR = 0xcd,
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CARL9170_RSP_GPIO = 0xce,
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CARL9170_RSP_BOOT = 0xcf,
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};
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struct carl9170_set_key_cmd {
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__le16 user;
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__le16 keyId;
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__le16 type;
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u8 macAddr[6];
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u32 key[4];
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} __packed __aligned(4);
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#define CARL9170_SET_KEY_CMD_SIZE 28
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struct carl9170_disable_key_cmd {
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__le16 user;
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__le16 padding;
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} __packed __aligned(4);
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#define CARL9170_DISABLE_KEY_CMD_SIZE 4
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struct carl9170_u32_list {
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u32 vals[0];
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} __packed;
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struct carl9170_reg_list {
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__le32 regs[0];
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} __packed;
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struct carl9170_write_reg {
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struct {
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__le32 addr;
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__le32 val;
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} regs[0] __packed;
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} __packed;
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#define CARL9170FW_PHY_HT_ENABLE 0x4
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#define CARL9170FW_PHY_HT_DYN2040 0x8
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#define CARL9170FW_PHY_HT_EXT_CHAN_OFF 0x3
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#define CARL9170FW_PHY_HT_EXT_CHAN_OFF_S 2
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struct carl9170_rf_init {
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__le32 freq;
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u8 ht_settings;
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u8 padding2[3];
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__le32 delta_slope_coeff_exp;
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__le32 delta_slope_coeff_man;
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__le32 delta_slope_coeff_exp_shgi;
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__le32 delta_slope_coeff_man_shgi;
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__le32 finiteLoopCount;
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} __packed;
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#define CARL9170_RF_INIT_SIZE 28
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struct carl9170_rf_init_result {
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__le32 ret; /* AR9170_PHY_REG_AGC_CONTROL */
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} __packed;
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#define CARL9170_RF_INIT_RESULT_SIZE 4
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#define CARL9170_PSM_SLEEP 0x1000
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#define CARL9170_PSM_SOFTWARE 0
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#define CARL9170_PSM_WAKE 0 /* internally used. */
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#define CARL9170_PSM_COUNTER 0xfff
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#define CARL9170_PSM_COUNTER_S 0
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struct carl9170_psm {
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__le32 state;
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} __packed;
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#define CARL9170_PSM_SIZE 4
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struct carl9170_rx_filter_cmd {
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__le32 rx_filter;
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} __packed;
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#define CARL9170_RX_FILTER_CMD_SIZE 4
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#define CARL9170_RX_FILTER_BAD 0x01
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#define CARL9170_RX_FILTER_OTHER_RA 0x02
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#define CARL9170_RX_FILTER_DECRY_FAIL 0x04
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#define CARL9170_RX_FILTER_CTL_OTHER 0x08
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#define CARL9170_RX_FILTER_CTL_PSPOLL 0x10
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#define CARL9170_RX_FILTER_CTL_BACKR 0x20
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#define CARL9170_RX_FILTER_MGMT 0x40
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#define CARL9170_RX_FILTER_DATA 0x80
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#define CARL9170_RX_FILTER_EVERYTHING (~0)
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struct carl9170_bcn_ctrl_cmd {
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__le32 vif_id;
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__le32 mode;
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__le32 bcn_addr;
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__le32 bcn_len;
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} __packed;
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#define CARL9170_BCN_CTRL_CMD_SIZE 16
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#define CARL9170_BCN_CTRL_DRAIN 0
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#define CARL9170_BCN_CTRL_CAB_TRIGGER 1
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struct carl9170_wol_cmd {
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__le32 flags;
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u8 mac[6];
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u8 bssid[6];
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__le32 null_interval;
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__le32 free_for_use2;
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__le32 mask;
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u8 pattern[32];
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} __packed;
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#define CARL9170_WOL_CMD_SIZE 60
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#define CARL9170_WOL_DISCONNECT 1
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#define CARL9170_WOL_MAGIC_PKT 2
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struct carl9170_cmd_head {
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union {
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struct {
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u8 len;
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u8 cmd;
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u8 seq;
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u8 ext;
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} __packed;
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u32 hdr_data;
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} __packed;
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} __packed;
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struct carl9170_cmd {
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struct carl9170_cmd_head hdr;
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union {
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struct carl9170_set_key_cmd setkey;
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struct carl9170_disable_key_cmd disablekey;
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struct carl9170_u32_list echo;
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struct carl9170_reg_list rreg;
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struct carl9170_write_reg wreg;
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struct carl9170_rf_init rf_init;
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struct carl9170_psm psm;
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struct carl9170_wol_cmd wol;
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struct carl9170_bcn_ctrl_cmd bcn_ctrl;
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struct carl9170_rx_filter_cmd rx_filter;
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u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
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} __packed;
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} __packed __aligned(4);
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#define CARL9170_TX_STATUS_QUEUE 3
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#define CARL9170_TX_STATUS_QUEUE_S 0
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#define CARL9170_TX_STATUS_RIX_S 2
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#define CARL9170_TX_STATUS_RIX (3 << CARL9170_TX_STATUS_RIX_S)
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#define CARL9170_TX_STATUS_TRIES_S 4
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#define CARL9170_TX_STATUS_TRIES (7 << CARL9170_TX_STATUS_TRIES_S)
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#define CARL9170_TX_STATUS_SUCCESS 0x80
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#ifdef __CARL9170FW__
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/*
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* NOTE:
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* Both structs [carl9170_tx_status and _carl9170_tx_status]
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* need to be "bit for bit" in sync.
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*/
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struct carl9170_tx_status {
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/*
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* Beware of compiler bugs in all gcc pre 4.4!
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*/
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u8 cookie;
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u8 queue:2;
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u8 rix:2;
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u8 tries:3;
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u8 success:1;
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} __packed;
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#endif /* __CARL9170FW__ */
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struct _carl9170_tx_status {
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/*
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* This version should be immune to all alignment bugs.
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*/
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u8 cookie;
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u8 info;
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} __packed;
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#define CARL9170_TX_STATUS_SIZE 2
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#define CARL9170_RSP_TX_STATUS_NUM (CARL9170_MAX_CMD_PAYLOAD_LEN / \
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sizeof(struct _carl9170_tx_status))
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#define CARL9170_TX_MAX_RATE_TRIES 7
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#define CARL9170_TX_MAX_RATES 4
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#define CARL9170_TX_MAX_RETRY_RATES (CARL9170_TX_MAX_RATES - 1)
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#define CARL9170_ERR_MAGIC "ERR:"
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#define CARL9170_BUG_MAGIC "BUG:"
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struct carl9170_gpio {
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__le32 gpio;
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} __packed;
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#define CARL9170_GPIO_SIZE 4
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struct carl9170_tsf_rsp {
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union {
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__le32 tsf[2];
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__le64 tsf_64;
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} __packed;
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} __packed;
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#define CARL9170_TSF_RSP_SIZE 8
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struct carl9170_tally_rsp {
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__le32 active;
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__le32 cca;
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__le32 tx_time;
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__le32 rx_total;
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__le32 rx_overrun;
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__le32 tick;
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} __packed;
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struct carl9170_rsp {
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struct carl9170_cmd_head hdr;
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union {
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struct carl9170_rf_init_result rf_init_res;
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struct carl9170_u32_list rreg_res;
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struct carl9170_u32_list echo;
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#ifdef __CARL9170FW__
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struct carl9170_tx_status tx_status[0];
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#endif /* __CARL9170FW__ */
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struct _carl9170_tx_status _tx_status[0];
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struct carl9170_gpio gpio;
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struct carl9170_tsf_rsp tsf;
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struct carl9170_psm psm;
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struct carl9170_tally_rsp tally;
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u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
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} __packed;
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} __packed __aligned(4);
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#endif /* __CARL9170_SHARED_FWCMD_H */
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