334 lines
7.4 KiB
C
334 lines
7.4 KiB
C
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#ifndef __HAL88XX_TXDESC_H__
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#define __HAL88XX_TXDESC_H__
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typedef struct _TX_DESC_88XX_
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{
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volatile u4Byte Dword0;
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volatile u4Byte Dword1;
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volatile u4Byte Dword2;
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volatile u4Byte Dword3;
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volatile u4Byte Dword4;
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volatile u4Byte Dword5;
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volatile u4Byte Dword6;
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volatile u4Byte Dword7;
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volatile u4Byte Dword8;
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volatile u4Byte Dword9;
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} TX_DESC_88XX, *PTX_DESC_88XX;
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#define SIZE_TXDESC_88XX 40
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typedef enum _HCI_TX_DMA_QUEUE_88XX_
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{
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//MGT
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HCI_TX_DMA_QUEUE_MGT = 0,
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//QoS
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HCI_TX_DMA_QUEUE_BK,
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HCI_TX_DMA_QUEUE_BE,
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HCI_TX_DMA_QUEUE_VI,
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HCI_TX_DMA_QUEUE_VO,
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//HI
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HCI_TX_DMA_QUEUE_HI0,
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HCI_TX_DMA_QUEUE_HI1,
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HCI_TX_DMA_QUEUE_HI2,
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HCI_TX_DMA_QUEUE_HI3,
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HCI_TX_DMA_QUEUE_HI4,
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HCI_TX_DMA_QUEUE_HI5,
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HCI_TX_DMA_QUEUE_HI6,
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HCI_TX_DMA_QUEUE_HI7,
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// Beacon
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HCI_TX_DMA_QUEUE_BCN,
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HCI_TX_DMA_QUEUE_MAX_NUM //14
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} HCI_TX_DMA_QUEUE_88XX, *PHCI_TX_DMA_QUEUE_88XX;
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#if 0
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// TODO: endian....
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#ifdef _BIG_ENDIAN_
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typedef struct _TXBD_ELEMENT_DW0_
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{
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u4Byte Rsvd_31 :1;
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u4Byte PsbLen :15;
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u4Byte Rsvd_14_15 :2;
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u4Byte Len :14;
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} TXBD_ELEMENT_DW0,*PTXBD_ELEMENT_DW0;
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typedef struct _TXBD_ELEMENT_DW_
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{
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u4Byte AmpduEn :1;
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u4Byte Rsvd16To30 :15;
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u4Byte Len :16;
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} TXBD_ELEMENT_DW,*PTXBD_ELEMENT_DW;
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#else // _LITTLE_ENDIAN_
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typedef struct _TXBD_ELEMENT_DW0_
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{
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u4Byte Len :14;
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u4Byte Rsvd_14_15 :2;
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u4Byte PsbLen :15;
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u4Byte Rsvd_31 :1;
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} TXBD_ELEMENT_DW0,*PTXBD_ELEMENT_DW0;
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typedef struct _TXBD_ELEMENT_DW_
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{
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u4Byte Len :16;
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u4Byte Rsvd16To30 :15;
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u4Byte AmpduEn :1;
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} TXBD_ELEMENT_DW,*PTXBD_ELEMENT_DW;
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#endif
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#endif
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typedef struct _TXBD_ELEMENT_
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{
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u4Byte Dword0;
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u4Byte Dword1;
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#if TXBD_SEG_32_64_SEL
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u4Byte Dword2;
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u4Byte Dword3;
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#endif //TXBD_SEG_32_64_SEL
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} TXBD_ELEMENT,*PTXBD_ELEMENT;
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typedef struct _TX_BUFFER_DESCRIPTOR_
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{
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TXBD_ELEMENT TXBD_ELE[TXBD_ELE_NUM];
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} TX_BUFFER_DESCRIPTOR, *PTX_BUFFER_DESCRIPTOR;
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typedef struct _HCI_TX_DMA_QUEUE_STRUCT_88XX_
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{
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//TXBD
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PTX_BUFFER_DESCRIPTOR pTXBD_head;
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//TXBD Queue management
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u2Byte hw_idx;
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u2Byte host_idx;
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//Two Method:
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// 1.) TXDESC Only
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// 2.) TXDESC + Payload
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PVOID ptx_desc_head;
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u2Byte total_txbd_num;
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u2Byte avail_txbd_num;
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// RWPtr IDX Reg
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u4Byte reg_rwptr_idx;
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} HCI_TX_DMA_QUEUE_STRUCT_88XX, *PHCI_TX_DMA_QUEUE_STRUCT_88XX;
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typedef struct _HCI_TX_DMA_MANAGER_88XX_
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{
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HCI_TX_DMA_QUEUE_STRUCT_88XX tx_queue[HCI_TX_DMA_QUEUE_MAX_NUM];
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} HCI_TX_DMA_MANAGER_88XX, *PHCI_TX_DMA_MANAGER_88XX;
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//typedef struct _TXBD_INFO_
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//{
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// u4Byte Length;
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// u4Byte AddrLow;
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//} TXBD_INFO_88XX, *PTXBD_INFO_88XX;
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typedef struct _TX_DESC_DATA_88XX_
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{
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// header
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pu1Byte pHdr;
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u4Byte hdrLen;
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u4Byte llcLen;
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// frame
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pu1Byte pBuf;
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u4Byte frLen;
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// encryption
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pu1Byte pMic;
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pu1Byte pIcv;
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// TXDESC Dword 1
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u4Byte rateId;
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u1Byte macId;
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u1Byte tid;
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BOOLEAN moreData;
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// TXDESC Dword 2
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BOOLEAN aggEn;
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u1Byte ampduDensity;
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BOOLEAN frag;
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BOOLEAN bk;
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u4Byte p_aid;
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BOOLEAN g_id;
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#if CFG_HAL_HW_AES_IV
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BOOLEAN hwAESIv;
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#endif
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// TXDESC Dword 3
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BOOLEAN RTSEn;
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BOOLEAN HWRTSEn;
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BOOLEAN CTS2Self;
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BOOLEAN useRate;
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BOOLEAN disRTSFB;
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BOOLEAN disDataFB;
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u1Byte maxAggNum;
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BOOLEAN navUseHdr;
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BOOLEAN ndpa;
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// TXDESC Dword 4
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u1Byte RTSRate;
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u1Byte RTSRateFBLmt;
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u1Byte dataRate;
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BOOLEAN rtyLmtEn;
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u1Byte dataRtyLmt;
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u1Byte dataRateFBLmt;
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// TXDESC Dword 5
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u1Byte dataBW;
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u1Byte dataSC;
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u1Byte RTSSC;
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u1Byte dataStbc;
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u1Byte dataLdpc;
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u1Byte dataShort;
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u1Byte RTSShort;
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u1Byte TXPowerOffset;
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u1Byte TXAnt;
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#if (CFG_HAL_HW_TX_SHORTCUT_REUSE_TXDESC || CFG_HAL_HW_TX_SHORTCUT_HDR_CONV)
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// TXDESC Dword 8
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BOOLEAN smhEn;
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BOOLEAN stwEn;
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BOOLEAN stwAntDis;
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BOOLEAN stwRateDis;
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BOOLEAN stwRbDis;
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BOOLEAN stwPktReDis;
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BOOLEAN macCp;
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BOOLEAN txwifiCp;
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#endif
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// encrypt
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u4Byte iv;
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u4Byte icv;
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u4Byte mic;
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u4Byte secType;
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BOOLEAN swCrypt;
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} TX_DESC_DATA_88XX, *PTX_DESC_DATA_88XX;
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VOID
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TxPolling88XX(
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IN HAL_PADAPTER Adapter,
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IN u1Byte QueueIndex
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);
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VOID
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SigninBeaconTXBD88XX
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(
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IN HAL_PADAPTER Adapter,
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IN pu4Byte beaconbuf,
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IN u2Byte frlen
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);
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VOID
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SetBeaconDownload88XX (
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IN HAL_PADAPTER Adapter,
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IN u4Byte Value
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);
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u2Byte
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GetTxQueueHWIdx88XX
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(
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IN HAL_PADAPTER Adapter,
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IN u4Byte q_num //enum _TX_QUEUE_
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);
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BOOLEAN
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FillTxHwCtrl88XX(
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IN HAL_PADAPTER Adapter,
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IN u4Byte queueIndex, //HCI_TX_DMA_QUEUE_88XX
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IN PVOID pDescData
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);
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RT_STATUS
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SyncSWTXBDHostIdxToHW88XX (
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IN HAL_PADAPTER Adapter,
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IN u4Byte queueIndex //HCI_TX_DMA_QUEUE_88XX
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);
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BOOLEAN
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QueryTxConditionMatch88XX(
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IN HAL_PADAPTER Adapter
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);
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RT_STATUS
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PrepareTXBD88XX(
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IN HAL_PADAPTER Adapter
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);
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VOID
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FillBeaconDesc88XX
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(
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IN HAL_PADAPTER Adapter,
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IN PVOID _pdesc,
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IN PVOID data_content,
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IN u2Byte txLength,
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IN BOOLEAN bForceUpdate
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);
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VOID
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GetBeaconTXBDTXDESC88XX(
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IN HAL_PADAPTER Adapter,
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OUT PTX_BUFFER_DESCRIPTOR *pTXBD,
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OUT PTX_DESC_88XX *ptx_desc
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);
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#if CFG_HAL_TX_SHORTCUT
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#if 0
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PVOID
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GetShortCutTxDesc88XX(
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IN HAL_PADAPTER Adapter
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);
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VOID
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ReleaseShortCutTxDesc88XX(
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IN HAL_PADAPTER Adapter,
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IN PVOID pTxDesc
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);
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#endif
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VOID
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SetShortCutTxBuffSize88XX(
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IN HAL_PADAPTER Adapter,
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IN PVOID pTxDesc,
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IN u2Byte txPktSize
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);
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u2Byte
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GetShortCutTxBuffSize88XX(
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IN HAL_PADAPTER Adapter,
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IN PVOID pTxDesc
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);
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PVOID
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CopyShortCutTxDesc88XX(
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IN HAL_PADAPTER Adapter,
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IN u4Byte queueIndex, //HCI_TX_DMA_QUEUE_88XX
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IN PVOID pTxDesc,
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IN u4Byte direction
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);
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BOOLEAN
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FillShortCutTxHwCtrl88XX(
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IN HAL_PADAPTER Adapter,
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IN u4Byte queueIndex, //HCI_TX_DMA_QUEUE_88XX
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IN PVOID pDescData,
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IN PVOID pTxDesc,
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IN u4Byte direction
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);
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#endif // CFG_HAL_TX_SHORTCUT
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void DumpTxBDesc88XX(
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IN HAL_PADAPTER Adapter,
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#ifdef CONFIG_RTL_PROC_NEW
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IN struct seq_file *s,
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#endif
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IN u4Byte q_num
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);
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#endif //#ifndef __HAL88XX_TXDESC_H__
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