2024-09-09 08:52:07 +00:00
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/*
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2024-09-09 08:57:42 +00:00
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* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
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2024-09-09 08:52:07 +00:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/of.h>
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2024-09-09 08:57:42 +00:00
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/of_platform.h>
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2024-09-09 08:52:07 +00:00
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#include <linux/regulator/consumer.h>
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#define WDT0_RST 0x04
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#define WDT0_EN 0x08
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2024-09-09 08:57:42 +00:00
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#define SEC_WDOG_RESET_OFFSET 0x0
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#define SEC_WDOG_CTL_OFFSET 0x4
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#define SEC_WDOG_BARK_OFFSET 0xc
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#define SEC_WDOG_BITE_OFFSET 0x10
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#define SEC_WDOG_BARK_VAL 0x7ffff
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#define SEC_WDOG_BITE_VAL 0x20
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#define SEC_WDOG_RESET_DO_RESET 0x1
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#define SEC_WDOG_CTL_ENABLE 0x1
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enum msm_target_index {
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DEFAULT = 0,
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MSM8916 = 1,
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};
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struct clk_pair {
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const char *compat;
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const char *dev;
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const char *clk;
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};
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static int bus_timeout_camera;
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static int bus_timeout_usb;
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static int pc_save;
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2024-09-09 08:57:42 +00:00
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struct bus_timeout_clks {
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struct clk_pair *clks_on;
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struct clk_pair *clks_off;
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uint32_t clks_on_sz;
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uint32_t clks_off_sz;
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};
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struct bus_timeout_data {
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const char *target;
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uint32_t ahb_bus_timeout;
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uint32_t sec_wdog;
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uint32_t mmss_vfe_base;
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uint32_t usb_otg_hs_base;
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};
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2024-09-09 08:52:07 +00:00
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static int bus_timeout_camera_set(const char *val, struct kernel_param *kp);
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module_param_call(bus_timeout_camera, bus_timeout_camera_set, param_get_int,
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&bus_timeout_camera, 0644);
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static int bus_timeout_usb_set(const char *val, struct kernel_param *kp);
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module_param_call(bus_timeout_usb, bus_timeout_usb_set, param_get_int,
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&bus_timeout_usb, 0644);
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static int pc_save_set(const char *val, struct kernel_param *kp);
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module_param_call(pc_save, pc_save_set, param_get_int, &pc_save, 0644);
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2024-09-09 08:57:42 +00:00
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struct completion pcsave_complete;
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2024-09-09 08:52:07 +00:00
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static struct clk_pair bus_timeout_camera_clocks_on[] = {
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/*
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* gcc_mmss_noc_cfg_ahb_clk should be on but right
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* now this clock is on by default and not accessable.
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* Update this table if gcc_mmss_noc_cfg_ahb_clk is
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* ever not enabled by default!
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*/
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{
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.compat = "qcom,cci",
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.dev = "fda0c000.qcom,cci",
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.clk = "camss_top_ahb_clk",
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},
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{
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.compat = "qcom,vfe40",
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.dev = "fda10000.qcom,vfe",
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.clk = "iface_clk",
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},
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2024-09-09 08:57:42 +00:00
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{
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.compat = "qcom,vfe40",
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.dev = "fda10000.qcom,vfe",
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.clk = "camss_ahb_clk",
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}
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2024-09-09 08:52:07 +00:00
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};
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static struct clk_pair bus_timeout_camera_clocks_off[] = {
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{
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.compat = "qcom,vfe40",
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2024-09-09 08:52:07 +00:00
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.dev = "fda10000.qcom,vfe",
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.clk = "camss_vfe_vfe_clk",
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2024-09-09 08:57:42 +00:00
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},
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};
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static struct bus_timeout_clks camera = {
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.clks_on = bus_timeout_camera_clocks_on,
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.clks_off = bus_timeout_camera_clocks_off,
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.clks_on_sz = ARRAY_SIZE(bus_timeout_camera_clocks_on),
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.clks_off_sz = ARRAY_SIZE(bus_timeout_camera_clocks_off),
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2024-09-09 08:52:07 +00:00
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};
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static struct clk_pair bus_timeout_usb_clocks_on[] = {
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{
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.dev = "f9a55000.usb",
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.clk = "iface_clk",
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},
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{
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.dev = "f9a55000.usb",
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.clk = "core_clk",
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},
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{
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.compat = "qcom,hsusb-otg",
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.dev = "msm_otg",
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.clk = "iface_clk",
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},
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{
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2024-09-09 08:57:42 +00:00
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.compat = "qcom,hsusb-otg",
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2024-09-09 08:52:07 +00:00
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.dev = "msm_otg",
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.clk = "core_clk",
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},
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};
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static struct clk_pair bus_timeout_usb_clocks_off[] = {
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{
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.dev = "f9a55000.usb",
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.clk = "core_clk",
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},
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{
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.compat = "qcom,hsusb-otg",
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.dev = "msm_otg",
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.clk = "core_clk",
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},
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};
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2024-09-09 08:57:42 +00:00
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static struct bus_timeout_clks usb = {
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.clks_on = bus_timeout_usb_clocks_on,
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.clks_off = bus_timeout_usb_clocks_off,
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.clks_on_sz = ARRAY_SIZE(bus_timeout_usb_clocks_on),
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.clks_off_sz = ARRAY_SIZE(bus_timeout_usb_clocks_off),
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};
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static struct bus_timeout_data data[] = {
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[DEFAULT] = {
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.target = "msm8974",
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.ahb_bus_timeout = 0xfd4a0800,
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.sec_wdog = 0xfc4aa000,
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.mmss_vfe_base = 0xfda10000,
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.usb_otg_hs_base = 0xf9a55000,
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},
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[MSM8916] = {
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.target = "msm8916, msm8939, msm8909",
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.ahb_bus_timeout = 0x193c000,
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.sec_wdog = 0x4aa000,
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.mmss_vfe_base = 0x1b10000,
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.usb_otg_hs_base = 0x78d9000,
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},
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};
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static struct bus_timeout_data *bus_timeout_get_data(void)
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{
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uint32_t index = DEFAULT;
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int rc;
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rc = of_machine_is_compatible("qcom,msm8916")
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|| of_machine_is_compatible("qcom,msm8939")
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|| of_machine_is_compatible("qcom,msm8909");
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if (rc)
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index = MSM8916;
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if (index >= ARRAY_SIZE(data)) {
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pr_err("Bus timeout test: index out of range\n");
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return NULL;
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}
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pr_info("Bus timeout test: target %s\n", data[index].target);
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return &data[index];
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}
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static void bus_timeout_clk_access(struct bus_timeout_clks *bus_timeout_clks)
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{
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int i;
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2024-09-09 08:57:42 +00:00
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struct device_node *node;
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struct clk *this_clock;
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if (!bus_timeout_clks) {
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pr_err("Bus timeout test: Missing clocks\n");
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return ;
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}
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2024-09-09 08:52:07 +00:00
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/*
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* Yes, none of this cleans up properly but the goal here
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* is to trigger a hang which is going to kill the rest of
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* the system anyway
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*/
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2024-09-09 08:57:42 +00:00
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for (i = 0; i < bus_timeout_clks->clks_on_sz; i++) {
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this_clock = NULL;
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/*
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* firstly, use the compatible string to find the clock.
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* if failed, try to dev_id to find the clock from target
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* related clk lookup table.
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*/
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if (bus_timeout_clks->clks_on[i].compat) {
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node = of_find_compatible_node(NULL, NULL,
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bus_timeout_clks->clks_on[i].compat);
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if (node)
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this_clock = of_clk_get_by_name(node,
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bus_timeout_clks->clks_on[i].clk);
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} else if (bus_timeout_clks->clks_on[i].dev) {
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this_clock = clk_get_sys(bus_timeout_clks->clks_on[i].dev,
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bus_timeout_clks->clks_on[i].clk);
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} else {
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pr_err("Bus timeout test: Invalid clock\n");
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continue;
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}
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if (!IS_ERR(this_clock)) {
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2024-09-09 08:52:07 +00:00
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if (clk_prepare_enable(this_clock))
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pr_warn("Device %s: Clock %s not enabled",
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2024-09-09 08:57:42 +00:00
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bus_timeout_clks->clks_on[i].dev,
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bus_timeout_clks->clks_on[i].clk);
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}
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2024-09-09 08:52:07 +00:00
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}
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2024-09-09 08:57:42 +00:00
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for (i = 0; i < bus_timeout_clks->clks_off_sz; i++) {
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this_clock = NULL;
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if (bus_timeout_clks->clks_off[i].compat) {
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node = of_find_compatible_node(NULL, NULL,
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bus_timeout_clks->clks_off[i].compat);
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if (node)
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this_clock = of_clk_get_by_name(node,
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bus_timeout_clks->clks_off[i].clk);
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} else if (bus_timeout_clks->clks_off[i].dev) {
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this_clock = clk_get_sys(bus_timeout_clks->clks_off[i].dev,
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bus_timeout_clks->clks_off[i].clk);
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} else {
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pr_err("Bus timeout test: Invalid clock\n");
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continue;
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}
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2024-09-09 08:52:07 +00:00
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if (!IS_ERR(this_clock))
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clk_disable_unprepare(this_clock);
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}
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}
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static int bus_timeout_camera_set(const char *val, struct kernel_param *kp)
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{
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int ret;
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uint32_t dummy;
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2024-09-09 08:57:42 +00:00
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uint32_t address;
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2024-09-09 08:52:07 +00:00
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void *hang_addr;
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struct regulator *r;
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2024-09-09 08:57:42 +00:00
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struct bus_timeout_data *data = NULL;
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2024-09-09 08:52:07 +00:00
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ret = param_set_int(val, kp);
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if (ret)
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return ret;
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if (bus_timeout_camera != 1)
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return -EPERM;
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2024-09-09 08:57:42 +00:00
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if (!(data = bus_timeout_get_data())) {
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pr_err("Bus timeout test: Unable to get target resource\n");
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return -EINVAL;
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}
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address = data->mmss_vfe_base;
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if (!address) {
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pr_err("Bus timeout test: Unable to get camera address\n");
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return -EINVAL;
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}
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2024-09-09 08:52:07 +00:00
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hang_addr = ioremap(address, SZ_4K);
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r = regulator_get(NULL, "gdsc_vfe");
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ret = IS_ERR(r);
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2024-09-09 08:57:42 +00:00
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if (!ret) {
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ret = regulator_enable(r);
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if (ret) {
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pr_err("Bus timeout test: regulator failed to enable\n");
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return ret;
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}
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} else {
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2024-09-09 08:52:07 +00:00
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pr_err("Bus timeout test: Unable to get regulator reference\n");
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return ret;
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}
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2024-09-09 08:57:42 +00:00
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bus_timeout_clk_access(&camera);
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2024-09-09 08:52:07 +00:00
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dummy = readl_relaxed(hang_addr);
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mdelay(15000);
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pr_err("Bus timeout test failed\n");
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iounmap(hang_addr);
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return -EIO;
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}
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static int bus_timeout_usb_set(const char *val, struct kernel_param *kp)
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{
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int ret;
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uint32_t dummy;
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2024-09-09 08:57:42 +00:00
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uint32_t address;
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2024-09-09 08:52:07 +00:00
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void *hang_addr;
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2024-09-09 08:57:42 +00:00
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struct bus_timeout_data *data = NULL;
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2024-09-09 08:52:07 +00:00
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ret = param_set_int(val, kp);
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if (ret)
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return ret;
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if (bus_timeout_usb != 1)
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return -EPERM;
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2024-09-09 08:57:42 +00:00
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if (!(data = bus_timeout_get_data())) {
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pr_err("Bus timeout test: Unable to get target resources\n");
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return -EINVAL;
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}
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address = data->usb_otg_hs_base;
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if (!address) {
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pr_err("Bus timeout test: Unable to get usb address\n");
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return -EINVAL;
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}
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2024-09-09 08:52:07 +00:00
|
|
|
hang_addr = ioremap(address, SZ_4K);
|
2024-09-09 08:57:42 +00:00
|
|
|
bus_timeout_clk_access(&usb);
|
2024-09-09 08:52:07 +00:00
|
|
|
dummy = readl_relaxed(hang_addr);
|
|
|
|
mdelay(15000);
|
|
|
|
pr_err("Bus timeout test failed: 0x%x\n", dummy);
|
|
|
|
iounmap(hang_addr);
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id apps_wdog_of_match[] = {
|
|
|
|
{ .compatible = "qcom,msm-watchdog" },
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __iomem *wdogbase;
|
2024-09-09 08:57:42 +00:00
|
|
|
static void *sec_wdog_virt;
|
|
|
|
static void *global_bus_timeout_disable;
|
|
|
|
static void *hang_addr;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
static int msm_apps_wdog_probe(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct device_node *node;
|
|
|
|
uint32_t base;
|
|
|
|
|
|
|
|
node = of_find_matching_node(NULL, apps_wdog_of_match);
|
|
|
|
if (node) {
|
|
|
|
ret = of_property_read_u32(node, "reg", &base);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("PC-Save test: Cannot read wdog base\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
wdogbase = ioremap(base, SZ_4K);
|
|
|
|
if (!wdogbase) {
|
|
|
|
pr_err("PC-save test: Cannot map wdog register space\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pr_info("PC-save test: wdog node not found\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void msm_apps_wdog_disable(void)
|
|
|
|
{
|
|
|
|
__raw_writel(1, wdogbase + WDT0_RST);
|
|
|
|
__raw_writel(0, wdogbase + WDT0_EN);
|
|
|
|
mb();
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static void pc_save_work(struct work_struct *work)
|
|
|
|
{
|
|
|
|
uint32_t dummy;
|
|
|
|
unsigned long flags;
|
|
|
|
uint32_t sec_status;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
|
|
|
/* Disable sec watchdog */
|
|
|
|
writel_relaxed(SEC_WDOG_RESET_DO_RESET, (sec_wdog_virt +
|
|
|
|
SEC_WDOG_RESET_OFFSET));
|
|
|
|
sec_status = readl_relaxed(sec_wdog_virt + SEC_WDOG_CTL_OFFSET);
|
|
|
|
writel_relaxed(sec_status & ~SEC_WDOG_CTL_ENABLE, (sec_wdog_virt +
|
|
|
|
SEC_WDOG_CTL_OFFSET));
|
|
|
|
/* Make sure sec watchdog is disabled before continuing */
|
|
|
|
mb();
|
|
|
|
|
|
|
|
/* Disable apps watchdog */
|
|
|
|
msm_apps_wdog_disable();
|
|
|
|
|
|
|
|
/* Set sec watchdog bite time < bark time */
|
|
|
|
writel_relaxed(SEC_WDOG_BARK_VAL, (sec_wdog_virt +
|
|
|
|
SEC_WDOG_BARK_OFFSET));
|
|
|
|
/* 1ms bite time in sleep clock cycles */
|
|
|
|
writel_relaxed(SEC_WDOG_BITE_VAL, (sec_wdog_virt +
|
|
|
|
SEC_WDOG_BITE_OFFSET));
|
|
|
|
writel_relaxed(sec_status | SEC_WDOG_CTL_ENABLE, (sec_wdog_virt +
|
|
|
|
SEC_WDOG_CTL_OFFSET));
|
|
|
|
/* Make sure sec watchdog is enabled before continuing */
|
|
|
|
mb();
|
|
|
|
|
|
|
|
/* Disable Bus timeout */
|
|
|
|
writel_relaxed(0x0, global_bus_timeout_disable);
|
|
|
|
/* Make sure bus timeout is disabled before continuing */
|
|
|
|
mb();
|
|
|
|
|
|
|
|
dummy = readl_relaxed(hang_addr);
|
|
|
|
mb();
|
|
|
|
|
|
|
|
mdelay(15000);
|
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
|
|
|
complete(&pcsave_complete);
|
|
|
|
}
|
|
|
|
|
|
|
|
DECLARE_WORK(pc_save_work_struct, pc_save_work);
|
2024-09-09 08:52:07 +00:00
|
|
|
static int pc_save_set(const char *val, struct kernel_param *kp)
|
|
|
|
{
|
|
|
|
int ret;
|
2024-09-09 08:57:42 +00:00
|
|
|
uint32_t address;
|
2024-09-09 08:52:07 +00:00
|
|
|
struct regulator *r;
|
2024-09-09 08:57:42 +00:00
|
|
|
struct bus_timeout_data *data = NULL;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
ret = param_set_int(val, kp);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
if (pc_save != 1)
|
|
|
|
return -EPERM;
|
2024-09-09 08:57:42 +00:00
|
|
|
|
|
|
|
init_completion(&pcsave_complete);
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
ret = msm_apps_wdog_probe();
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!(data = bus_timeout_get_data())) {
|
|
|
|
pr_err("Bus timeout test: Unable to get target resouces\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
address = data->mmss_vfe_base;
|
|
|
|
if (!address) {
|
|
|
|
pr_err("Bus timeout test: Unable to get camera address\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2024-09-09 08:52:07 +00:00
|
|
|
hang_addr = ioremap(address, SZ_4K);
|
|
|
|
if (!hang_addr) {
|
|
|
|
pr_err("PC-save test: unable to map hang address\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!data->ahb_bus_timeout ||
|
|
|
|
!(global_bus_timeout_disable =
|
|
|
|
ioremap(data->ahb_bus_timeout, SZ_4K))) {
|
2024-09-09 08:52:07 +00:00
|
|
|
pr_err("PC-save test: unable to map bus timeout disable\
|
|
|
|
AHB_BUS_TIMEOUT register\n");
|
|
|
|
iounmap(hang_addr);
|
|
|
|
iounmap(wdogbase);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
r = regulator_get(NULL, "gdsc_vfe");
|
|
|
|
ret = IS_ERR(r);
|
|
|
|
if (!ret) {
|
|
|
|
ret = regulator_enable(r);
|
|
|
|
if (ret < 0) {
|
|
|
|
pr_err("PC-save test: unable to enable regulator\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pr_err("PC-save test: Unable to get regulator reference\n");
|
|
|
|
return ret;
|
|
|
|
}
|
2024-09-09 08:57:42 +00:00
|
|
|
bus_timeout_clk_access(&camera);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!data->sec_wdog ||
|
|
|
|
!(sec_wdog_virt = ioremap(data->sec_wdog, SZ_4K))) {
|
2024-09-09 08:52:07 +00:00
|
|
|
pr_err("unable to map sec wdog page\n");
|
|
|
|
iounmap(hang_addr);
|
|
|
|
iounmap(wdogbase);
|
|
|
|
iounmap(global_bus_timeout_disable);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
schedule_work(&pc_save_work_struct);
|
|
|
|
wait_for_completion(&pcsave_complete);
|
2024-09-09 08:52:07 +00:00
|
|
|
pr_err("Bus timeout test failed\n");
|
|
|
|
iounmap(hang_addr);
|
|
|
|
iounmap(wdogbase);
|
|
|
|
iounmap(global_bus_timeout_disable);
|
|
|
|
iounmap(sec_wdog_virt);
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int bus_timeout_init(void)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void bus_timeout_exit(void)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(bus_timeout_init);
|
|
|
|
module_exit(bus_timeout_exit);
|
|
|
|
MODULE_LICENSE("GPL v2");
|