476 lines
14 KiB
C
476 lines
14 KiB
C
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#ifndef _H_MSM_VPU_H_
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#define _H_MSM_VPU_H_
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#include <linux/videodev2.h>
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/*
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* V 4 L 2 E X T E N S I O N S B Y V P U
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*/
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/*
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* v4l2_buffer:
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*
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* VPU uses standard V4L2 buffer flags, and defines some custom
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* flags (used in v4l2_buffer.flags field):
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* V4L2_QCOM_BUF_FLAG_EOS: buffer flag indicating end of stream
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* V4L2_BUF_FLAG_CDS_ENABLE: buffer flag to enable chroma down-sampling
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*/
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#define V4L2_BUF_FLAG_CDS_ENABLE 0x10000000
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/*
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* VPU uses multi-plane v4l2_buffer in the following manner:
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* each plane can be a separate ION buffer, or all planes are from the
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* same ION buffer (under this case all planes have the same fd, but different
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* offset).
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*
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* For struct v4l2_plane
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* fd: ION fd representing the ION buffer this plane is from
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* reserved[0]: offset of this plane from the start of the ION buffer in
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* bytes. Needed when all planes are from the same ION buffer.
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*/
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#define V4L2_PLANE_MEM_OFFSET 0
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/*
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* struct v4l2_format:
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* always use v4l2_pix_format_mplane, even when there is only one plane
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*
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* v4l2_pix_format_mplane:
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*
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* VPU uses v4l2_pix_format_mplane for pixel format configuration
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* The following members of this structure is either extended or changed:
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* pixelformat: extended, a few more private formats added
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* colorspace: possible values are enum vpu_colorspace
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* field: when it is V4L2_FIELD_ALTERNATE, flags from vpu format extension
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* specifies which field first.
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* reserved[]: VPU format extension. struct v4l2_format_vpu_extension
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*/
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enum vpu_colorspace {
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VPU_CS_MIN = 0,
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/* RGB with full range*/
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VPU_CS_RGB_FULL = 1,
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/* RGB with limited range*/
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VPU_CS_RGB_LIMITED = 2,
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/* REC 601 with full range */
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VPU_CS_REC601_FULL = 3,
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/* REC 601 with limited range */
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VPU_CS_REC601_LIMITED = 4,
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/* REC 709 with full range */
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VPU_CS_REC709_FULL = 5,
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/* REC 709 with limited range */
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VPU_CS_REC709_LIMITED = 6,
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/* SMPTE 240 with full range */
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VPU_CS_SMPTE240_FULL = 7,
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/* SMPTE 240 with limited range */
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VPU_CS_SMPTE240_LIMITED = 8,
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VPU_CS_MAX = 9,
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};
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#define VPU_FMT_EXT_FLAG_BT 1 /* bottom field first */
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#define VPU_FMT_EXT_FLAG_TB 2 /* top field first */
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#define VPU_FMT_EXT_FLAG_3D 4 /* 3D format */
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struct v4l2_format_vpu_extension {
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__u8 flag;
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__u8 gap_in_lines;
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};
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/*
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* Supported pixel formats:
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*
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* VPU supported pixel format fourcc codes (use in s_fmt pixelformat field).
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* Can be enumerated using VIDIOC_ENUM_FMT
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*
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* Standard V4L2 formats, defined in videodev2.h :
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*
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* V4L2_PIX_FMT_RGB24 24 bit RGB-8-8-8
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* V4L2_PIX_FMT_RGB32 32 bit XRGB-8-8-8-8
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* V4L2_PIX_FMT_BGR24 24 bit BGR-8-8-8
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* V4L2_PIX_FMT_BGR32 32 bit BGRX-8-8-8-8
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*
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* V4L2_PIX_FMT_NV12 12 bit YUV 4:2:0 semi-planar NV12
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* V4L2_PIX_FMT_NV21 12 bit YUV 4:2:0 semi-planar NV21
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* V4L2_PIX_FMT_YUYV 16 bit YUYV 4:2:2 interleaved
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* V4L2_PIX_FMT_YVYU 16 bit YVYU 4:2:2 interleaved
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* V4L2_PIX_FMT_UYVY 16 bit UYVY 4:2:2 interleaved
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* V4L2_PIX_FMT_VYUY 16 bit VYUY 4:2:2 interleaved
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*
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*
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* Private VPU formats, defined here :
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*
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* V4L2_PIX_FMT_XRGB2 32 bit XRGB-2-10-10-10
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* V4L2_PIX_FMT_XBGR2 32 bit XBGR-2-10-10-10
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*
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* V4L2_PIX_FMT_YUYV10 24 bit YUYV 4:2:2 10 bit per component loose
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* V4L2_PIX_FMT_YUV8 24 bit YUV 4:4:4 8 bit per component
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* V4L2_PIX_FMT_YUV10 32 bit YUV 4:4:4 10 bit per component loose
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* V4L2_PIX_FMT_YUYV10BWC 10 bit YUYV 4:2:2 compressed, for output only
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*/
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#define V4L2_PIX_FMT_XRGB2 v4l2_fourcc('X', 'R', 'G', '2')
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#define V4L2_PIX_FMT_XBGR2 v4l2_fourcc('X', 'B', 'G', '2')
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#define V4L2_PIX_FMT_YUYV10 v4l2_fourcc('Y', 'U', 'Y', 'L')
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#define V4L2_PIX_FMT_YUV8 v4l2_fourcc('Y', 'U', 'V', '8')
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#define V4L2_PIX_FMT_YUV10 v4l2_fourcc('Y', 'U', 'V', 'L')
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#define V4L2_PIX_FMT_YUYV10BWC v4l2_fourcc('Y', 'B', 'W', 'C')
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/*
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* VIDIOC_S_INPUT/VIDIOC_S_OUTPUT
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*
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* The single integer passed by these commands specifies port type in the
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* lower 16 bits, and pipe bit mask in the higher 16 bits.
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*/
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/* input / output types */
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#define VPU_INPUT_TYPE_HOST 0
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#define VPU_INPUT_TYPE_VCAP 1
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#define VPU_OUTPUT_TYPE_HOST 0
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#define VPU_OUTPUT_TYPE_DISPLAY 1
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/* input / output pipe bit fields */
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#define VPU_PIPE_VCAP0 (1 << 16)
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#define VPU_PIPE_VCAP1 (1 << 17)
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#define VPU_PIPE_DISPLAY0 (1 << 18)
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#define VPU_PIPE_DISPLAY1 (1 << 19)
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#define VPU_PIPE_DISPLAY2 (1 << 20)
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#define VPU_PIPE_DISPLAY3 (1 << 21)
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/*
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* V P U E V E N T S : I D s A N D D A T A P A Y L O A D S
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*/
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/*
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* Event ID: set in type field of struct v4l2_event
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* payload: returned in u.data array of struct v4l2_event
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*
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*
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* VPU_EVENT_FLUSH_DONE: Done flushing buffers after VPU_FLUSH_BUFS ioctl
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* payload data: enum v4l2_buf_type (buffer type of flushed port)
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*
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* VPU_EVENT_ACTIVE_REGION_CHANGED: New Active Region Detected
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* payload data: struct v4l2_rect (new active region rectangle)
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*
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* VPU_EVENT_SESSION_TIMESTAMP: New Session timestamp
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* payload data: vpu_frame_timestamp_info
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*
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* VPU_EVENT_SESSION_CREATED: New session has been created
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* payload data: int (number of the attached session)
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*
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* VPU_EVENT_SESSION_FREED: Session is detached and free
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* payload data: int (number of the detached session)
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*
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* VPU_EVENT_SESSION_CLIENT_EXITED: Indicates that clients of current
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* session have exited.
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* payload data: int (number of all remaining clients for this session)
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*
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* VPU_EVENT_HW_ERROR: a hardware error occurred in VPU
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* payload data: NULL
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*
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* VPU_EVENT_INVALID_CONFIG: invalid VPU session configuration
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* payload data: NULL
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*
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* VPU_EVENT_FAILED_SESSION_STREAMING: Failed to stream session
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* payload data: NULL
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*/
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#define VPU_PRIVATE_EVENT_BASE (V4L2_EVENT_PRIVATE_START + 6 * 1000)
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enum VPU_PRIVATE_EVENT {
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VPU_EVENT_START = VPU_PRIVATE_EVENT_BASE,
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VPU_EVENT_FLUSH_DONE = VPU_EVENT_START + 1,
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VPU_EVENT_ACTIVE_REGION_CHANGED = VPU_EVENT_START + 2,
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VPU_EVENT_SESSION_TIMESTAMP = VPU_EVENT_START + 3,
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VPU_EVENT_SESSION_CREATED = VPU_EVENT_START + 4,
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VPU_EVENT_SESSION_FREED = VPU_EVENT_START + 5,
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VPU_EVENT_SESSION_CLIENT_EXITED = VPU_EVENT_START + 6,
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VPU_EVENT_HW_ERROR = VPU_EVENT_START + 11,
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VPU_EVENT_INVALID_CONFIG = VPU_EVENT_START + 12,
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VPU_EVENT_FAILED_SESSION_STREAMING = VPU_EVENT_START + 13,
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VPU_EVENT_END
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};
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/*
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* V P U CO N T R O L S : S T R U C T S A N D I D s
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*
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* Controls are video processing parameters
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*/
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/*
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* Standard VPU Controls
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*/
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struct vpu_ctrl_standard {
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__u32 enable; /* boolean: 0=disable, else=enable */
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__s32 value;
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};
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struct vpu_ctrl_auto_manual {
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__u32 enable; /* boolean: 0=disable, else=enable */
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__u32 auto_mode; /* boolean: 0=manual, else=automatic */
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__s32 value;
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};
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struct vpu_ctrl_range_mapping {
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__u32 enable; /* boolean: 0=disable, else=enable */
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__u32 y_range; /* the range mapping set for Y [0, 7] */
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__u32 uv_range; /* the range mapping set for UV [0, 7] */
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};
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#define VPU_ACTIVE_REGION_N_EXCLUSIONS 1
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struct vpu_ctrl_active_region_param {
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__u32 enable; /* boolean: 0=disable, else=enable */
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/* number of exclusion regions */
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__u32 num_exclusions;
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/* roi where active region detection is applied */
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struct v4l2_rect detection_region;
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/* roi(s) excluded from active region detection*/
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struct v4l2_rect excluded_regions[VPU_ACTIVE_REGION_N_EXCLUSIONS];
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};
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struct vpu_ctrl_deinterlacing_mode {
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__u32 field_polarity;
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__u32 mvp_mode;
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};
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struct vpu_ctrl_hqv {
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__u32 enable;
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/* strength control of all sharpening features [0, 100] */
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__u32 sharpen_strength;
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/* strength control of Auto NR feature [0, 100] */
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__u32 auto_nr_strength;
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};
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struct vpu_info_frame_timestamp {
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/* presentation timestamp of the frame */
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__u32 pts_low;
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__u32 pts_high;
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/* qtimer snapshot */
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__u32 qtime_low;
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__u32 qtime_high;
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};
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struct vpu_control {
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__u32 control_id;
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union control_data {
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__s32 value;
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struct vpu_ctrl_standard standard;
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struct vpu_ctrl_auto_manual auto_manual;
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struct vpu_ctrl_range_mapping range_mapping;
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struct vpu_ctrl_active_region_param active_region_param;
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struct v4l2_rect active_region_result;
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struct vpu_ctrl_deinterlacing_mode deinterlacing_mode;
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struct vpu_ctrl_hqv hqv;
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struct vpu_info_frame_timestamp timestamp;
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__u8 reserved[124];
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} data;
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};
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/*
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* IDs for standard controls (use in control_id field of struct vpu_control)
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*
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* VPU_CTRL_NOISE_REDUCTION: noise reduction level, data: auto_manual,
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* value: [0, 100] (step in increments of 25).
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*
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* VPU_CTRL_IMAGE_ENHANCEMENT: image enhancement level, data: auto_manual,
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* value: [-100, 100] (step in increments of 1).
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*
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* VPU_CTRL_ANAMORPHIC_SCALING: anamorphic scaling config, data: standard,
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* value: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_DIRECTIONAL_INTERPOLATION: directional interpolation config
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* data: standard, value: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_BACKGROUND_COLOR: , data: value,
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* value: red[0:7] green[8:15] blue[16:23] alpha[24:31]
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*
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* VPU_CTRL_RANGE_MAPPING: Y/UV range mapping, data: range_mapping,
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* y_range: [0, 7], uv_range: [0, 7] (step in increments of 1).
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*
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* VPU_CTRL_DEINTERLACING_MODE: deinterlacing mode, data: deinterlacing_mode,
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* field_polarity: [0, 2], mvp_mode: [0, 2] (step in increments of 1).
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*
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* VPU_CTRL_ACTIVE_REGION_PARAM: active region detection parameters (set only)
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* data: active_region_param,
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*
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* VPU_CTRL_ACTIVE_REGION_RESULT: detected active region roi (get only)
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* data: active_region_result
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*
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* VPU_CTRL_PRIORITY: Session priority, data: value,
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* value: high 100, normal 50
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*
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* VPU_CTRL_CONTENT_PROTECTION: input content protection status, data: value,
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* value: secure 1, non-secure 0
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*
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* VPU_CTRL_DISPLAY_REFRESH_RATE: display refresh rate (set only)
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* data: value (set to __u32 16.16 format)
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*
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* VPU_CTRL_HQV: hqv block config, data: hqv,
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* sharpen_strength: [0, 100] (step in increments of 25),
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* auto_nr_strength: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_HQV_SHARPEN: , data: value,
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* sharpen_strength: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_HQV_AUTONR: , data: value,
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* auto_nr_strength: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_ACE: , data: value
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*
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* VPU_CTRL_ACE_BRIGHTNESS: , data: value,
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* value: [-100, 100] (step in increments of 1).
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*
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* VPU_CTRL_ACE_CONTRAST: , data: value,
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* value: [-100, 100] (step in increments of 1).
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*
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* VPU_CTRL_2D3D: , data: value,
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* value: 1 enabled, 0 disabled
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*
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* VPU_CTRL_2D3D_DEPTH: , data: value,
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* value: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_TIMESTAMP_INFO_MODE: timestamp reporting mode,
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* data: value specifying how frequent a timestamp reporting info, value
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* is in frames
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*
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* VPU_INFO_TIMESTAMP: timestamp information (get only)
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* data: struct vpu_frame_timestamp_info
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*
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* VPU_CTRL_FRC: enable/disable FRC, data: value,
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* value: 1 enable, 0 disable
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*
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* VPU_CTRL_FRC_MOTION_SMOOTHNESS: , data: value,
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* value: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_FRC_MOTION_CLEAR: , data: value,
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* value: [0, 100] (step in increments of 1).
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*
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* VPU_CTRL_LATENCY: session latency, data: value in us
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*
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* VPU_CTRL_LATENCY_MODE: data: value (ultra low, low, etc.)
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*
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* VPU_INFO_STATISTICS: frames dropped, etc (get only),
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* data: reserved
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*/
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#define VPU_CTRL_ID_MIN 0
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#define VPU_CTRL_NOISE_REDUCTION 1
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#define VPU_CTRL_IMAGE_ENHANCEMENT 2
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#define VPU_CTRL_ANAMORPHIC_SCALING 3
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#define VPU_CTRL_DIRECTIONAL_INTERPOLATION 4
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#define VPU_CTRL_BACKGROUND_COLOR 5
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#define VPU_CTRL_RANGE_MAPPING 6
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#define VPU_CTRL_DEINTERLACING_MODE 7
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#define VPU_CTRL_ACTIVE_REGION_PARAM 8
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#define VPU_CTRL_ACTIVE_REGION_RESULT 9
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#define VPU_CTRL_PRIORITY 10
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#define VPU_CTRL_CONTENT_PROTECTION 11
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#define VPU_CTRL_DISPLAY_REFRESH_RATE 12
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#define VPU_CTRL_HQV 20
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#define VPU_CTRL_HQV_SHARPEN 21
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#define VPU_CTRL_HQV_AUTONR 22
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#define VPU_CTRL_ACE 23
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#define VPU_CTRL_ACE_BRIGHTNESS 24
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#define VPU_CTRL_ACE_CONTRAST 25
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|
#define VPU_CTRL_2D3D 26
|
||
|
#define VPU_CTRL_2D3D_DEPTH 27
|
||
|
#define VPU_CTRL_FRC 28
|
||
|
#define VPU_CTRL_FRC_MOTION_SMOOTHNESS 29
|
||
|
#define VPU_CTRL_FRC_MOTION_CLEAR 30
|
||
|
|
||
|
#define VPU_INFO_TIMESTAMP 35
|
||
|
#define VPU_CTRL_TIMESTAMP_INFO_MODE 36
|
||
|
#define VPU_INFO_STATISTICS 37
|
||
|
#define VPU_CTRL_LATENCY 38
|
||
|
#define VPU_CTRL_LATENCY_MODE 39
|
||
|
|
||
|
#define VPU_CTRL_ID_MAX 40
|
||
|
|
||
|
|
||
|
/*
|
||
|
* Extended VPU Controls (large data payloads)
|
||
|
*/
|
||
|
#define VPU_MAX_EXT_DATA_SIZE 720
|
||
|
struct vpu_control_extended {
|
||
|
/*
|
||
|
* extended control type
|
||
|
* 0: system
|
||
|
* 1: session
|
||
|
*/
|
||
|
__u32 type;
|
||
|
|
||
|
/*
|
||
|
* size and ptr of the data to send
|
||
|
* maximum VPU_MAX_EXT_DATA_SIZE bytes
|
||
|
*/
|
||
|
__u32 data_len;
|
||
|
void __user *data_ptr;
|
||
|
|
||
|
/*
|
||
|
* size and ptr of the buffer to recv data
|
||
|
* maximum VPU_MAX_EXT_DATA_SIZE bytes
|
||
|
*/
|
||
|
__u32 buf_size;
|
||
|
void __user *buf_ptr;
|
||
|
};
|
||
|
|
||
|
/*
|
||
|
* Port specific controls
|
||
|
*/
|
||
|
struct vpu_control_port {
|
||
|
__u32 control_id;
|
||
|
__u32 port; /* 0: INPUT, 1: OUTPUT */
|
||
|
union control_port_data {
|
||
|
__u32 framerate;
|
||
|
} data;
|
||
|
};
|
||
|
|
||
|
/*
|
||
|
* IDs for port controls (use in control_id field of struct vpu_control_port)
|
||
|
*
|
||
|
* VPU_CTRL_FPS: set frame rate, data: __u32, 16.16 format
|
||
|
*/
|
||
|
#define VPU_CTRL_FPS 1000
|
||
|
|
||
|
|
||
|
/*
|
||
|
* V P U D E V I C E P R I V A T E I O C T L C O D E S
|
||
|
*/
|
||
|
|
||
|
/* VPU Session ioctls (deprecated) */
|
||
|
#define VPU_ATTACH_TO_SESSION _IOW('V', (BASE_VIDIOC_PRIVATE + 1), int)
|
||
|
|
||
|
/* VPU Session ioctls */
|
||
|
#define VPU_QUERY_SESSIONS _IOR('V', (BASE_VIDIOC_PRIVATE + 0), int)
|
||
|
#define VPU_CREATE_SESSION _IOR('V', (BASE_VIDIOC_PRIVATE + 2), int)
|
||
|
#define VPU_JOIN_SESSION _IOW('V', (BASE_VIDIOC_PRIVATE + 3), int)
|
||
|
|
||
|
/* Enable second VPU output port and use with current client */
|
||
|
#define VPU_CREATE_OUTPUT2 _IO('V', (BASE_VIDIOC_PRIVATE + 5))
|
||
|
|
||
|
/* Explicit commit of session configuration */
|
||
|
#define VPU_COMMIT_CONFIGURATION _IO('V', (BASE_VIDIOC_PRIVATE + 10))
|
||
|
|
||
|
/* Flush all buffers of given type (port) */
|
||
|
#define VPU_FLUSH_BUFS _IOW('V', (BASE_VIDIOC_PRIVATE + 15), \
|
||
|
enum v4l2_buf_type)
|
||
|
|
||
|
/* VPU controls get/set ioctls (for most controls with small data) */
|
||
|
#define VPU_G_CONTROL _IOWR('V', (BASE_VIDIOC_PRIVATE + 20), \
|
||
|
struct vpu_control)
|
||
|
#define VPU_S_CONTROL _IOW('V', (BASE_VIDIOC_PRIVATE + 21), \
|
||
|
struct vpu_control)
|
||
|
|
||
|
/* extended control set/get ioctls (large data payloads) */
|
||
|
#define VPU_G_CONTROL_EXTENDED _IOWR('V', (BASE_VIDIOC_PRIVATE + 22), \
|
||
|
struct vpu_control_extended)
|
||
|
#define VPU_S_CONTROL_EXTENDED _IOW('V', (BASE_VIDIOC_PRIVATE + 23), \
|
||
|
struct vpu_control_extended)
|
||
|
|
||
|
/* VPU port (input/output) specific controls get/set ioctls */
|
||
|
#define VPU_G_CONTROL_PORT _IOWR('V', (BASE_VIDIOC_PRIVATE + 24), \
|
||
|
struct vpu_control_port)
|
||
|
#define VPU_S_CONTROL_PORT _IOW('V', (BASE_VIDIOC_PRIVATE + 25), \
|
||
|
struct vpu_control_port)
|
||
|
|
||
|
#endif /* _H_MSM_VPU_H_ */
|
||
|
|