2024-09-09 08:52:07 +00:00
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/*
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* Copyright (C) ST-Ericsson AB 2010
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* Author: Daniel Martensson / daniel.martensson@stericsson.com
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* Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef CAIF_HSI_H_
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#define CAIF_HSI_H_
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#include <net/caif/caif_layer.h>
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#include <net/caif/caif_device.h>
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#include <linux/atomic.h>
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/*
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* Maximum number of CAIF frames that can reside in the same HSI frame.
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*/
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#define CFHSI_MAX_PKTS 15
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/*
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* Maximum number of bytes used for the frame that can be embedded in the
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* HSI descriptor.
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*/
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#define CFHSI_MAX_EMB_FRM_SZ 96
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/*
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* Decides if HSI buffers should be prefilled with 0xFF pattern for easier
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* debugging. Both TX and RX buffers will be filled before the transfer.
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*/
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#define CFHSI_DBG_PREFILL 0
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/* Structure describing a HSI packet descriptor. */
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#pragma pack(1) /* Byte alignment. */
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struct cfhsi_desc {
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u8 header;
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u8 offset;
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u16 cffrm_len[CFHSI_MAX_PKTS];
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u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
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};
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#pragma pack() /* Default alignment. */
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/* Size of the complete HSI packet descriptor. */
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#define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))
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/*
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* Size of the complete HSI packet descriptor excluding the optional embedded
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* CAIF frame.
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*/
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#define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)
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/*
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* Maximum bytes transferred in one transfer.
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*/
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#define CFHSI_MAX_CAIF_FRAME_SZ 4096
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#define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * CFHSI_MAX_CAIF_FRAME_SZ)
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/* Size of the complete HSI TX buffer. */
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#define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)
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/* Size of the complete HSI RX buffer. */
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#define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)
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/* Bitmasks for the HSI descriptor. */
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#define CFHSI_PIGGY_DESC (0x01 << 7)
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#define CFHSI_TX_STATE_IDLE 0
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#define CFHSI_TX_STATE_XFER 1
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#define CFHSI_RX_STATE_DESC 0
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#define CFHSI_RX_STATE_PAYLOAD 1
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/* Bitmasks for power management. */
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#define CFHSI_WAKE_UP 0
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#define CFHSI_WAKE_UP_ACK 1
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#define CFHSI_WAKE_DOWN_ACK 2
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#define CFHSI_AWAKE 3
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#define CFHSI_WAKELOCK_HELD 4
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#define CFHSI_SHUTDOWN 5
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#define CFHSI_FLUSH_FIFO 6
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#ifndef CFHSI_INACTIVITY_TOUT
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#define CFHSI_INACTIVITY_TOUT (1 * HZ)
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#endif /* CFHSI_INACTIVITY_TOUT */
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#ifndef CFHSI_WAKE_TOUT
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#define CFHSI_WAKE_TOUT (3 * HZ)
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#endif /* CFHSI_WAKE_TOUT */
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#ifndef CFHSI_MAX_RX_RETRIES
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#define CFHSI_MAX_RX_RETRIES (10 * HZ)
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#endif
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/* Structure implemented by the CAIF HSI driver. */
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2024-09-09 08:57:42 +00:00
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struct cfhsi_cb_ops {
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void (*tx_done_cb) (struct cfhsi_cb_ops *drv);
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void (*rx_done_cb) (struct cfhsi_cb_ops *drv);
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void (*wake_up_cb) (struct cfhsi_cb_ops *drv);
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void (*wake_down_cb) (struct cfhsi_cb_ops *drv);
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2024-09-09 08:52:07 +00:00
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};
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/* Structure implemented by HSI device. */
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2024-09-09 08:57:42 +00:00
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struct cfhsi_ops {
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int (*cfhsi_up) (struct cfhsi_ops *dev);
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int (*cfhsi_down) (struct cfhsi_ops *dev);
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int (*cfhsi_tx) (u8 *ptr, int len, struct cfhsi_ops *dev);
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int (*cfhsi_rx) (u8 *ptr, int len, struct cfhsi_ops *dev);
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int (*cfhsi_wake_up) (struct cfhsi_ops *dev);
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int (*cfhsi_wake_down) (struct cfhsi_ops *dev);
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int (*cfhsi_get_peer_wake) (struct cfhsi_ops *dev, bool *status);
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int (*cfhsi_fifo_occupancy) (struct cfhsi_ops *dev, size_t *occupancy);
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int (*cfhsi_rx_cancel)(struct cfhsi_ops *dev);
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struct cfhsi_cb_ops *cb_ops;
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2024-09-09 08:52:07 +00:00
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};
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/* Structure holds status of received CAIF frames processing */
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struct cfhsi_rx_state {
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int state;
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int nfrms;
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int pld_len;
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int retries;
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bool piggy_desc;
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};
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2024-09-09 08:57:42 +00:00
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/* Priority mapping */
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enum {
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CFHSI_PRIO_CTL = 0,
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CFHSI_PRIO_VI,
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CFHSI_PRIO_VO,
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CFHSI_PRIO_BEBK,
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CFHSI_PRIO_LAST,
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};
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struct cfhsi_config {
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u32 inactivity_timeout;
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u32 aggregation_timeout;
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u32 head_align;
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u32 tail_align;
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u32 q_high_mark;
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u32 q_low_mark;
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};
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2024-09-09 08:52:07 +00:00
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/* Structure implemented by CAIF HSI drivers. */
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struct cfhsi {
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struct caif_dev_common cfdev;
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struct net_device *ndev;
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struct platform_device *pdev;
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2024-09-09 08:57:42 +00:00
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struct sk_buff_head qhead[CFHSI_PRIO_LAST];
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struct cfhsi_cb_ops cb_ops;
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struct cfhsi_ops *ops;
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2024-09-09 08:52:07 +00:00
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int tx_state;
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struct cfhsi_rx_state rx_state;
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struct cfhsi_config cfg;
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int rx_len;
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u8 *rx_ptr;
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u8 *tx_buf;
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u8 *rx_buf;
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u8 *rx_flip_buf;
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spinlock_t lock;
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int flow_off_sent;
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struct list_head list;
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struct work_struct wake_up_work;
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struct work_struct wake_down_work;
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struct work_struct out_of_sync_work;
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struct workqueue_struct *wq;
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wait_queue_head_t wake_up_wait;
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wait_queue_head_t wake_down_wait;
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wait_queue_head_t flush_fifo_wait;
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struct timer_list inactivity_timer;
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struct timer_list rx_slowpath_timer;
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2024-09-09 08:57:42 +00:00
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/* TX aggregation */
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int aggregation_len;
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struct timer_list aggregation_timer;
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2024-09-09 08:52:07 +00:00
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unsigned long bits;
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};
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extern struct platform_driver cfhsi_driver;
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2024-09-09 08:57:42 +00:00
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/**
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* enum ifla_caif_hsi - CAIF HSI NetlinkRT parameters.
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* @IFLA_CAIF_HSI_INACTIVITY_TOUT: Inactivity timeout before
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* taking the HSI wakeline down, in milliseconds.
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* When using RT Netlink to create, destroy or configure a CAIF HSI interface,
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* enum ifla_caif_hsi is used to specify the configuration attributes.
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*/
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enum ifla_caif_hsi {
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__IFLA_CAIF_HSI_UNSPEC,
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__IFLA_CAIF_HSI_INACTIVITY_TOUT,
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__IFLA_CAIF_HSI_AGGREGATION_TOUT,
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__IFLA_CAIF_HSI_HEAD_ALIGN,
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__IFLA_CAIF_HSI_TAIL_ALIGN,
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__IFLA_CAIF_HSI_QHIGH_WATERMARK,
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__IFLA_CAIF_HSI_QLOW_WATERMARK,
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__IFLA_CAIF_HSI_MAX
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};
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struct cfhsi_ops *cfhsi_get_ops(void);
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2024-09-09 08:52:07 +00:00
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#endif /* CAIF_HSI_H_ */
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