154 lines
5.7 KiB
C
154 lines
5.7 KiB
C
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MSM_CLOCKS_CALIFORNIUM_H
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#define __MSM_CLOCKS_CALIFORNIUM_H
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/* RPM controlled clocks */
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#define clk_xo 0xf13dfee3
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#define clk_xo_a_clk 0xd939b99b
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#define clk_ce_clk 0xd8bc64e1
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#define clk_ce_a_clk 0x4dfefd47
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#define clk_pcnoc_clk 0xc1296d0f
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#define clk_pcnoc_a_clk 0x9bcffee4
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#define clk_bimc_clk 0x4b80bf00
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#define clk_bimc_a_clk 0x4b25668a
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#define clk_snoc_clk 0x2c341aa0
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#define clk_snoc_a_clk 0x8fcef2af
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#define clk_ipa_clk 0xfa685cda
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#define clk_ipa_a_clk 0xeeec2919
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#define clk_qpic_clk 0x3ce6f7bb
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#define clk_qpic_a_clk 0xd70ccb7c
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#define clk_qdss_clk 0x1492202a
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#define clk_qdss_a_clk 0xdd121669
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#define clk_bimc_msmbus_clk 0xd212feea
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#define clk_bimc_msmbus_a_clk 0x71d1a499
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#define clk_mcd_ce_clk 0x7ad13979
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#define clk_pcnoc_keepalive_a_clk 0x9464f720
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#define clk_pcnoc_msmbus_clk 0x2b53b688
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#define clk_pcnoc_msmbus_a_clk 0x9753a54f
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#define clk_pcnoc_pm_clk 0x5e636b5d
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#define clk_pcnoc_sps_clk 0x23d3f584
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#define clk_qcedev_ce_clk 0x2e7f9cee
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#define clk_qcrypto_ce_clk 0xd8cd060b
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#define clk_qseecom_ce_clk 0xea036e4b
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#define clk_scm_ce_clk 0xfd35bb87
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#define clk_snoc_msmbus_clk 0xe6900bb6
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#define clk_snoc_msmbus_a_clk 0x5d4683bd
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#define clk_cxo_dwc3_clk 0xf79c19f6
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#define clk_cxo_lpm_clk 0x94adbf3d
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#define clk_cxo_otg_clk 0x4eec0bb9
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#define clk_div_clk1 0xaa1157a6
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#define clk_div_clk1_ao 0x6b943d68
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#define clk_ln_bb_clk 0x3ab0b36d
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#define clk_ln_bb_a_clk 0xc7257ea8
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#define clk_rf_clk1 0xaabeea5a
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#define clk_rf_clk1_ao 0x72a10cb8
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#define clk_rf_clk1_pin 0x8f463562
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#define clk_rf_clk1_pin_ao 0x62549ff6
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#define clk_rf_clk2 0x24a30992
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#define clk_rf_clk2_ao 0x944d8bbd
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#define clk_rf_clk2_pin 0xa7c5602a
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#define clk_rf_clk2_pin_ao 0x2d75eb4d
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#define clk_rf_clk3 0xb673936b
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#define clk_rf_clk3_ao 0x038bb968
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#define clk_rf_clk3_pin 0x726f53f5
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#define clk_rf_clk3_pin_ao 0x76f9240f
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/* APSS controlled clocks */
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#define clk_gpll0 0x1ebe3bc4
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#define clk_gpll0_ao 0xa1368304
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#define clk_gpll0_out_msscc 0x7d794829
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#define clk_usb30_master_clk_src 0xc6262f89
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#define clk_blsp1_qup1_i2c_apps_clk_src 0x17f78f5e
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#define clk_blsp1_qup1_spi_apps_clk_src 0xf534c4fa
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#define clk_blsp1_qup2_i2c_apps_clk_src 0x8de71c79
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#define clk_blsp1_qup2_spi_apps_clk_src 0x33cf809a
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#define clk_blsp1_qup3_i2c_apps_clk_src 0xf161b902
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#define clk_blsp1_qup3_spi_apps_clk_src 0x5e95683f
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#define clk_blsp1_qup4_i2c_apps_clk_src 0xb2ecce68
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#define clk_blsp1_qup4_spi_apps_clk_src 0xddb5bbdb
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#define clk_blsp1_uart1_apps_clk_src 0xf8146114
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#define clk_blsp1_uart2_apps_clk_src 0xfc9c2f73
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#define clk_blsp1_uart3_apps_clk_src 0x600497f2
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#define clk_blsp1_uart4_apps_clk_src 0x56bff15c
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#define clk_gp1_clk_src 0xad85b97a
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#define clk_gp2_clk_src 0xfb1f0065
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#define clk_gp3_clk_src 0x63b693d6
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#define clk_pcie_aux_clk_src 0xebc50566
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#define clk_pdm2_clk_src 0x31e494fd
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#define clk_sdcc1_apps_clk_src 0xd4975db2
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#define clk_usb30_mock_utmi_clk_src 0xa024a976
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#define clk_usb3_aux_clk_src 0xfde7ae09
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#define clk_gcc_pcie_phy_reset 0x9bc3c959
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#define clk_gcc_qusb2a_phy_reset 0x2a9dfa9f
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#define clk_gcc_usb3phy_phy_reset 0xb1a4f885
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#define clk_gcc_usb3_phy_reset 0x03d559f1
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#define clk_gpll0_out_main_cgc 0xb0298998
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#define clk_gcc_blsp1_ahb_clk 0x8caa5b4f
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#define clk_gcc_blsp1_qup1_i2c_apps_clk 0xc303fae9
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#define clk_gcc_blsp1_qup1_spi_apps_clk 0x759a76b0
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#define clk_gcc_blsp1_qup2_i2c_apps_clk 0x1076f220
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#define clk_gcc_blsp1_qup2_spi_apps_clk 0x3e77d48f
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#define clk_gcc_blsp1_qup3_i2c_apps_clk 0x9e25ac82
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#define clk_gcc_blsp1_qup3_spi_apps_clk 0xfb978880
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#define clk_gcc_blsp1_qup4_i2c_apps_clk 0xd7f40f6f
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#define clk_gcc_blsp1_qup4_spi_apps_clk 0x80f8722f
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#define clk_gcc_blsp1_uart1_apps_clk 0xc7c62f90
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#define clk_gcc_blsp1_uart2_apps_clk 0xf8a61c96
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#define clk_gcc_blsp1_uart3_apps_clk 0xc3298bd7
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#define clk_gcc_blsp1_uart4_apps_clk 0x26be16c0
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#define clk_gcc_boot_rom_ahb_clk 0xde2adeb1
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#define clk_gcc_dcc_clk 0xd1000c50
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#define clk_gpll0_out_main_div2_cgc 0xc76ac7ae
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#define clk_gcc_gp1_clk 0x057f7b69
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#define clk_gcc_gp2_clk 0x9bf83ffd
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#define clk_gcc_gp3_clk 0xec6539ee
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#define clk_gcc_mss_q6_bimc_axi_clk 0x67544d62
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#define clk_gcc_pcie_axi_clk 0xb833d9e3
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#define clk_gcc_pcie_axi_mstr_clk 0x54d09178
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#define clk_gcc_pcie_cfg_ahb_clk 0xddc9a515
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#define clk_gcc_pcie_pipe_clk 0x8be62558
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#define clk_gcc_pcie_sleep_clk 0x8b8bfc3b
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#define clk_gcc_pdm2_clk 0x99d55711
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#define clk_gcc_pdm_ahb_clk 0x365664f6
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#define clk_gcc_prng_ahb_clk 0x397e7eaa
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#define clk_gcc_sdcc1_ahb_clk 0x691e0caa
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#define clk_gcc_sdcc1_apps_clk 0x9ad6fb96
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#define clk_gcc_apss_tcu_clk 0xaf56a329
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#define clk_gcc_pcie_axi_tbu_clk 0xab70f06e
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#define clk_gcc_pcie_ref_clk 0x63fca50a
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#define clk_gcc_usb_ss_ref_clk 0xb85dadfa
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#define clk_gcc_qusb_ref_clk 0x16e35a90
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#define clk_gcc_smmu_cfg_clk 0x75eaefa5
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#define clk_gcc_usb3_axi_tbu_clk 0x18779c6e
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#define clk_gcc_sys_noc_usb3_axi_clk 0x94d26800
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#define clk_gcc_usb30_master_clk 0xb3b4e2cb
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#define clk_gcc_usb30_mock_utmi_clk 0xa800b65a
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#define clk_gcc_usb30_sleep_clk 0xd0b65c92
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#define clk_gcc_usb3_aux_clk 0x555d16b2
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#define clk_gcc_usb3_pipe_clk 0x26f8a97a
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#define clk_gcc_usb_phy_cfg_ahb_clk 0xccb7e26f
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#define clk_gcc_mss_cfg_ahb_clk 0x111cde81
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/* a7pll */
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#define clk_a7pll_clk 0x3dd5dd94
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/* clock_debug controlled clocks */
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#define clk_gcc_debug_mux 0x8121ac15
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/* Audio External Clocks */
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#define clk_audio_lpass_mclk 0x575ec22b
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#endif
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