2024-09-09 08:52:07 +00:00
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/*
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* mrst_max3110.c - spi uart protocol driver for Maxim 3110
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*
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* Copyright (c) 2008-2010, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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/*
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* Note:
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* 1. From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
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* 1 word. If SPI master controller doesn't support sclk frequency change,
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* then the char need be sent out one by one with some delay
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*
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* 2. Currently only RX available interrupt is used, no need for waiting TXE
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* interrupt for a low speed UART device
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*/
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#ifdef CONFIG_MAGIC_SYSRQ
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/kthread.h>
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#include <linux/spi/spi.h>
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2024-09-09 08:57:42 +00:00
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#include <linux/pm.h>
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2024-09-09 08:52:07 +00:00
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#include "mrst_max3110.h"
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#define PR_FMT "mrst_max3110: "
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#define UART_TX_NEEDED 1
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#define CON_TX_NEEDED 2
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#define BIT_IRQ_PENDING 3
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struct uart_max3110 {
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struct uart_port port;
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struct spi_device *spi;
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char name[SPI_NAME_SIZE];
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wait_queue_head_t wq;
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struct task_struct *main_thread;
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struct task_struct *read_thread;
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struct mutex thread_mutex;
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2024-09-09 08:57:42 +00:00
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struct mutex io_mutex;
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2024-09-09 08:52:07 +00:00
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u32 baud;
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u16 cur_conf;
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u8 clock;
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u8 parity, word_7bits;
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u16 irq;
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unsigned long uart_flags;
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/* console related */
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struct circ_buf con_xmit;
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};
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/* global data structure, may need be removed */
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static struct uart_max3110 *pmax;
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static int receive_chars(struct uart_max3110 *max,
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unsigned short *str, int len);
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static int max3110_read_multi(struct uart_max3110 *max);
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static void max3110_con_receive(struct uart_max3110 *max);
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static int max3110_write_then_read(struct uart_max3110 *max,
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const void *txbuf, void *rxbuf, unsigned len, int always_fast)
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{
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struct spi_device *spi = max->spi;
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struct spi_message message;
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struct spi_transfer x;
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int ret;
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2024-09-09 08:57:42 +00:00
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mutex_lock(&max->io_mutex);
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2024-09-09 08:52:07 +00:00
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spi_message_init(&message);
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memset(&x, 0, sizeof x);
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x.len = len;
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x.tx_buf = txbuf;
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x.rx_buf = rxbuf;
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spi_message_add_tail(&x, &message);
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if (always_fast)
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x.speed_hz = spi->max_speed_hz;
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else if (max->baud)
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x.speed_hz = max->baud;
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/* Do the i/o */
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ret = spi_sync(spi, &message);
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2024-09-09 08:57:42 +00:00
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mutex_unlock(&max->io_mutex);
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2024-09-09 08:52:07 +00:00
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return ret;
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}
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/* Write a 16b word to the device */
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static int max3110_out(struct uart_max3110 *max, const u16 out)
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{
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void *buf;
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u16 *obuf, *ibuf;
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int ret;
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buf = kzalloc(8, GFP_KERNEL | GFP_DMA);
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if (!buf)
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return -ENOMEM;
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obuf = buf;
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ibuf = buf + 4;
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*obuf = out;
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ret = max3110_write_then_read(max, obuf, ibuf, 2, 1);
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if (ret) {
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pr_warning(PR_FMT "%s(): get err msg %d when sending 0x%x\n",
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__func__, ret, out);
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goto exit;
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}
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receive_chars(max, ibuf, 1);
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exit:
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kfree(buf);
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return ret;
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}
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/*
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* This is usually used to read data from SPIC RX FIFO, which doesn't
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* need any delay like flushing character out.
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*
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* Return how many valide bytes are read back
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*/
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static int max3110_read_multi(struct uart_max3110 *max)
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{
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void *buf;
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u16 *obuf, *ibuf;
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int ret, blen;
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blen = M3110_RX_FIFO_DEPTH * sizeof(u16);
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buf = kzalloc(blen * 2, GFP_KERNEL | GFP_DMA);
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if (!buf) {
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pr_warning(PR_FMT "%s(): fail to alloc dma buffer\n", __func__);
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return 0;
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}
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/* tx/rx always have the same length */
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obuf = buf;
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ibuf = buf + blen;
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if (max3110_write_then_read(max, obuf, ibuf, blen, 1)) {
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kfree(buf);
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return 0;
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}
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ret = receive_chars(max, ibuf, M3110_RX_FIFO_DEPTH);
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kfree(buf);
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return ret;
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}
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static void serial_m3110_con_putchar(struct uart_port *port, int ch)
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{
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struct uart_max3110 *max =
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container_of(port, struct uart_max3110, port);
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struct circ_buf *xmit = &max->con_xmit;
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if (uart_circ_chars_free(xmit)) {
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xmit->buf[xmit->head] = (char)ch;
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xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
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}
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}
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/*
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* Print a string to the serial port trying not to disturb
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* any possible real use of the port...
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*
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* The console_lock must be held when we get here.
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*/
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static void serial_m3110_con_write(struct console *co,
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const char *s, unsigned int count)
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{
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if (!pmax)
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return;
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uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
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if (!test_and_set_bit(CON_TX_NEEDED, &pmax->uart_flags))
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wake_up(&pmax->wq);
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}
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static int __init
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serial_m3110_con_setup(struct console *co, char *options)
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{
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struct uart_max3110 *max = pmax;
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int baud = 115200;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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pr_info(PR_FMT "setting up console\n");
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if (co->index == -1)
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co->index = 0;
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if (!max) {
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pr_err(PR_FMT "pmax is NULL, return");
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return -ENODEV;
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}
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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return uart_set_options(&max->port, co, baud, parity, bits, flow);
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}
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static struct tty_driver *serial_m3110_con_device(struct console *co,
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int *index)
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{
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struct uart_driver *p = co->data;
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*index = co->index;
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return p->tty_driver;
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}
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static struct uart_driver serial_m3110_reg;
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static struct console serial_m3110_console = {
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.name = "ttyS",
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.write = serial_m3110_con_write,
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.device = serial_m3110_con_device,
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.setup = serial_m3110_con_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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.data = &serial_m3110_reg,
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};
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static unsigned int serial_m3110_tx_empty(struct uart_port *port)
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{
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return 1;
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}
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static void serial_m3110_stop_tx(struct uart_port *port)
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{
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return;
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}
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/* stop_rx will be called in spin_lock env */
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static void serial_m3110_stop_rx(struct uart_port *port)
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{
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return;
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}
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#define WORDS_PER_XFER 128
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static void send_circ_buf(struct uart_max3110 *max,
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struct circ_buf *xmit)
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{
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void *buf;
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u16 *obuf, *ibuf;
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int i, len, blen, dma_size, left, ret = 0;
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dma_size = WORDS_PER_XFER * sizeof(u16) * 2;
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buf = kzalloc(dma_size, GFP_KERNEL | GFP_DMA);
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if (!buf)
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return;
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obuf = buf;
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ibuf = buf + dma_size/2;
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while (!uart_circ_empty(xmit)) {
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left = uart_circ_chars_pending(xmit);
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while (left) {
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len = min(left, WORDS_PER_XFER);
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blen = len * sizeof(u16);
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memset(ibuf, 0, blen);
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for (i = 0; i < len; i++) {
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obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
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xmit->tail = (xmit->tail + 1) &
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(UART_XMIT_SIZE - 1);
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}
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/* Fail to send msg to console is not very critical */
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ret = max3110_write_then_read(max, obuf, ibuf, blen, 0);
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if (ret)
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pr_warning(PR_FMT "%s(): get err msg %d\n",
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__func__, ret);
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receive_chars(max, ibuf, len);
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max->port.icount.tx += len;
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left -= len;
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}
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}
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kfree(buf);
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}
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static void transmit_char(struct uart_max3110 *max)
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{
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struct uart_port *port = &max->port;
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struct circ_buf *xmit = &port->state->xmit;
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if (uart_circ_empty(xmit) || uart_tx_stopped(port))
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return;
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send_circ_buf(max, xmit);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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serial_m3110_stop_tx(port);
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}
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/*
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* This will be called by uart_write() and tty_write, can't
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* go to sleep
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*/
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static void serial_m3110_start_tx(struct uart_port *port)
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{
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struct uart_max3110 *max =
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container_of(port, struct uart_max3110, port);
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if (!test_and_set_bit(UART_TX_NEEDED, &max->uart_flags))
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wake_up(&max->wq);
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}
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static int
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receive_chars(struct uart_max3110 *max, unsigned short *str, int len)
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{
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struct uart_port *port = &max->port;
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2024-09-09 08:57:42 +00:00
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struct tty_port *tport;
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2024-09-09 08:52:07 +00:00
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char buf[M3110_RX_FIFO_DEPTH];
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int r, w, usable;
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/* If uart is not opened, just return */
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if (!port->state)
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return 0;
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2024-09-09 08:57:42 +00:00
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tport = &port->state->port;
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2024-09-09 08:52:07 +00:00
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for (r = 0, w = 0; r < len; r++) {
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if (str[r] & MAX3110_BREAK &&
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uart_handle_break(port))
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continue;
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if (str[r] & MAX3110_READ_DATA_AVAILABLE) {
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if (uart_handle_sysrq_char(port, str[r] & 0xff))
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continue;
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buf[w++] = str[r] & 0xff;
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}
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}
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2024-09-09 08:57:42 +00:00
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if (!w)
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2024-09-09 08:52:07 +00:00
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return 0;
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for (r = 0; w; r += usable, w -= usable) {
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2024-09-09 08:57:42 +00:00
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usable = tty_buffer_request_room(tport, w);
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2024-09-09 08:52:07 +00:00
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if (usable) {
|
2024-09-09 08:57:42 +00:00
|
|
|
tty_insert_flip_string(tport, buf + r, usable);
|
2024-09-09 08:52:07 +00:00
|
|
|
port->icount.rx += usable;
|
|
|
|
}
|
|
|
|
}
|
2024-09-09 08:57:42 +00:00
|
|
|
tty_flip_buffer_push(tport);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This routine will be used in read_thread or RX IRQ handling,
|
|
|
|
* it will first do one round buffer read(8 words), if there is some
|
|
|
|
* valid RX data, will try to read 5 more rounds till all data
|
|
|
|
* is read out.
|
|
|
|
*
|
|
|
|
* Use stack space as data buffer to save some system load, and chose
|
|
|
|
* 504 Btyes as a threadhold to do a bulk push to upper tty layer when
|
|
|
|
* receiving bulk data, a much bigger buffer may cause stack overflow
|
|
|
|
*/
|
|
|
|
static void max3110_con_receive(struct uart_max3110 *max)
|
|
|
|
{
|
|
|
|
int loop = 1, num;
|
|
|
|
|
|
|
|
do {
|
|
|
|
num = max3110_read_multi(max);
|
|
|
|
|
|
|
|
if (num) {
|
|
|
|
loop = 5;
|
|
|
|
}
|
|
|
|
} while (--loop);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int max3110_main_thread(void *_max)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max = _max;
|
|
|
|
wait_queue_head_t *wq = &max->wq;
|
|
|
|
int ret = 0;
|
|
|
|
struct circ_buf *xmit = &max->con_xmit;
|
|
|
|
|
|
|
|
pr_info(PR_FMT "start main thread\n");
|
|
|
|
|
|
|
|
do {
|
|
|
|
wait_event_interruptible(*wq,
|
|
|
|
max->uart_flags || kthread_should_stop());
|
|
|
|
|
|
|
|
mutex_lock(&max->thread_mutex);
|
|
|
|
|
|
|
|
if (test_and_clear_bit(BIT_IRQ_PENDING, &max->uart_flags))
|
|
|
|
max3110_con_receive(max);
|
|
|
|
|
|
|
|
/* first handle console output */
|
|
|
|
if (test_and_clear_bit(CON_TX_NEEDED, &max->uart_flags))
|
|
|
|
send_circ_buf(max, xmit);
|
|
|
|
|
|
|
|
/* handle uart output */
|
|
|
|
if (test_and_clear_bit(UART_TX_NEEDED, &max->uart_flags))
|
|
|
|
transmit_char(max);
|
|
|
|
|
|
|
|
mutex_unlock(&max->thread_mutex);
|
|
|
|
|
|
|
|
} while (!kthread_should_stop());
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max = dev_id;
|
|
|
|
|
|
|
|
/* max3110's irq is a falling edge, not level triggered,
|
|
|
|
* so no need to disable the irq */
|
|
|
|
|
|
|
|
if (!test_and_set_bit(BIT_IRQ_PENDING, &max->uart_flags))
|
|
|
|
wake_up(&max->wq);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* if don't use RX IRQ, then need a thread to polling read */
|
|
|
|
static int max3110_read_thread(void *_max)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max = _max;
|
|
|
|
|
|
|
|
pr_info(PR_FMT "start read thread\n");
|
|
|
|
do {
|
|
|
|
/*
|
|
|
|
* If can't acquire the mutex, it means the main thread
|
|
|
|
* is running which will also perform the rx job
|
|
|
|
*/
|
|
|
|
if (mutex_trylock(&max->thread_mutex)) {
|
|
|
|
max3110_con_receive(max);
|
|
|
|
mutex_unlock(&max->thread_mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
|
|
schedule_timeout(HZ / 20);
|
|
|
|
} while (!kthread_should_stop());
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int serial_m3110_startup(struct uart_port *port)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max =
|
|
|
|
container_of(port, struct uart_max3110, port);
|
|
|
|
u16 config = 0;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (port->line != 0) {
|
|
|
|
pr_err(PR_FMT "uart port startup failed\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable all IRQ and config it to 115200, 8n1 */
|
|
|
|
config = WC_TAG | WC_FIFO_ENABLE
|
|
|
|
| WC_1_STOPBITS
|
|
|
|
| WC_8BIT_WORD
|
|
|
|
| WC_BAUD_DR2;
|
|
|
|
|
|
|
|
/* as we use thread to handle tx/rx, need set low latency */
|
2024-09-09 08:57:42 +00:00
|
|
|
port->state->port.low_latency = 1;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
if (max->irq) {
|
2024-09-09 08:57:42 +00:00
|
|
|
/* Enable RX IRQ only */
|
|
|
|
config |= WC_RXA_IRQ_ENABLE;
|
|
|
|
} else {
|
2024-09-09 08:52:07 +00:00
|
|
|
/* If IRQ is disabled, start a read thread for input data */
|
|
|
|
max->read_thread =
|
|
|
|
kthread_run(max3110_read_thread, max, "max3110_read");
|
|
|
|
if (IS_ERR(max->read_thread)) {
|
|
|
|
ret = PTR_ERR(max->read_thread);
|
|
|
|
max->read_thread = NULL;
|
|
|
|
pr_err(PR_FMT "Can't create read thread!\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = max3110_out(max, config);
|
|
|
|
if (ret) {
|
|
|
|
if (max->read_thread)
|
|
|
|
kthread_stop(max->read_thread);
|
|
|
|
max->read_thread = NULL;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
max->cur_conf = config;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void serial_m3110_shutdown(struct uart_port *port)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max =
|
|
|
|
container_of(port, struct uart_max3110, port);
|
|
|
|
u16 config;
|
|
|
|
|
|
|
|
if (max->read_thread) {
|
|
|
|
kthread_stop(max->read_thread);
|
|
|
|
max->read_thread = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable interrupts from this port */
|
|
|
|
config = WC_TAG | WC_SW_SHDI;
|
|
|
|
max3110_out(max, config);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void serial_m3110_release_port(struct uart_port *port)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static int serial_m3110_request_port(struct uart_port *port)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void serial_m3110_config_port(struct uart_port *port, int flags)
|
|
|
|
{
|
|
|
|
port->type = PORT_MAX3100;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
|
|
{
|
|
|
|
/* we don't want the core code to modify any port params */
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static const char *serial_m3110_type(struct uart_port *port)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max =
|
|
|
|
container_of(port, struct uart_max3110, port);
|
|
|
|
return max->name;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
|
struct ktermios *old)
|
|
|
|
{
|
|
|
|
struct uart_max3110 *max =
|
|
|
|
container_of(port, struct uart_max3110, port);
|
|
|
|
unsigned char cval;
|
|
|
|
unsigned int baud, parity = 0;
|
|
|
|
int clk_div = -1;
|
|
|
|
u16 new_conf = max->cur_conf;
|
|
|
|
|
|
|
|
switch (termios->c_cflag & CSIZE) {
|
|
|
|
case CS7:
|
|
|
|
cval = UART_LCR_WLEN7;
|
|
|
|
new_conf |= WC_7BIT_WORD;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* We only support CS7 & CS8 */
|
|
|
|
termios->c_cflag &= ~CSIZE;
|
|
|
|
termios->c_cflag |= CS8;
|
|
|
|
case CS8:
|
|
|
|
cval = UART_LCR_WLEN8;
|
|
|
|
new_conf |= WC_8BIT_WORD;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, 230400);
|
|
|
|
|
|
|
|
/* First calc the div for 1.8MHZ clock case */
|
|
|
|
switch (baud) {
|
|
|
|
case 300:
|
|
|
|
clk_div = WC_BAUD_DR384;
|
|
|
|
break;
|
|
|
|
case 600:
|
|
|
|
clk_div = WC_BAUD_DR192;
|
|
|
|
break;
|
|
|
|
case 1200:
|
|
|
|
clk_div = WC_BAUD_DR96;
|
|
|
|
break;
|
|
|
|
case 2400:
|
|
|
|
clk_div = WC_BAUD_DR48;
|
|
|
|
break;
|
|
|
|
case 4800:
|
|
|
|
clk_div = WC_BAUD_DR24;
|
|
|
|
break;
|
|
|
|
case 9600:
|
|
|
|
clk_div = WC_BAUD_DR12;
|
|
|
|
break;
|
|
|
|
case 19200:
|
|
|
|
clk_div = WC_BAUD_DR6;
|
|
|
|
break;
|
|
|
|
case 38400:
|
|
|
|
clk_div = WC_BAUD_DR3;
|
|
|
|
break;
|
|
|
|
case 57600:
|
|
|
|
clk_div = WC_BAUD_DR2;
|
|
|
|
break;
|
|
|
|
case 115200:
|
|
|
|
clk_div = WC_BAUD_DR1;
|
|
|
|
break;
|
|
|
|
case 230400:
|
|
|
|
if (max->clock & MAX3110_HIGH_CLK)
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* Pick the previous baud rate */
|
|
|
|
baud = max->baud;
|
|
|
|
clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
|
|
|
|
tty_termios_encode_baud_rate(termios, baud, baud);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (max->clock & MAX3110_HIGH_CLK) {
|
|
|
|
clk_div += 1;
|
|
|
|
/* High clk version max3110 doesn't support B300 */
|
|
|
|
if (baud == 300) {
|
|
|
|
baud = 600;
|
|
|
|
clk_div = WC_BAUD_DR384;
|
|
|
|
}
|
|
|
|
if (baud == 230400)
|
|
|
|
clk_div = WC_BAUD_DR1;
|
|
|
|
tty_termios_encode_baud_rate(termios, baud, baud);
|
|
|
|
}
|
|
|
|
|
|
|
|
new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
|
|
|
|
|
|
|
|
if (unlikely(termios->c_cflag & CMSPAR))
|
|
|
|
termios->c_cflag &= ~CMSPAR;
|
|
|
|
|
|
|
|
if (termios->c_cflag & CSTOPB)
|
|
|
|
new_conf |= WC_2_STOPBITS;
|
|
|
|
else
|
|
|
|
new_conf &= ~WC_2_STOPBITS;
|
|
|
|
|
|
|
|
if (termios->c_cflag & PARENB) {
|
|
|
|
new_conf |= WC_PARITY_ENABLE;
|
|
|
|
parity |= UART_LCR_PARITY;
|
|
|
|
} else
|
|
|
|
new_conf &= ~WC_PARITY_ENABLE;
|
|
|
|
|
|
|
|
if (!(termios->c_cflag & PARODD))
|
|
|
|
parity |= UART_LCR_EPAR;
|
|
|
|
max->parity = parity;
|
|
|
|
|
|
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
|
|
|
|
new_conf |= WC_TAG;
|
|
|
|
if (new_conf != max->cur_conf) {
|
|
|
|
if (!max3110_out(max, new_conf)) {
|
|
|
|
max->cur_conf = new_conf;
|
|
|
|
max->baud = baud;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Don't handle hw handshaking */
|
|
|
|
static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
|
|
|
|
{
|
|
|
|
return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void serial_m3110_pm(struct uart_port *port, unsigned int state,
|
|
|
|
unsigned int oldstate)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static struct uart_ops serial_m3110_ops = {
|
2024-09-09 08:52:07 +00:00
|
|
|
.tx_empty = serial_m3110_tx_empty,
|
|
|
|
.set_mctrl = serial_m3110_set_mctrl,
|
|
|
|
.get_mctrl = serial_m3110_get_mctrl,
|
|
|
|
.stop_tx = serial_m3110_stop_tx,
|
|
|
|
.start_tx = serial_m3110_start_tx,
|
|
|
|
.stop_rx = serial_m3110_stop_rx,
|
|
|
|
.break_ctl = serial_m3110_break_ctl,
|
|
|
|
.startup = serial_m3110_startup,
|
|
|
|
.shutdown = serial_m3110_shutdown,
|
|
|
|
.set_termios = serial_m3110_set_termios,
|
|
|
|
.pm = serial_m3110_pm,
|
|
|
|
.type = serial_m3110_type,
|
|
|
|
.release_port = serial_m3110_release_port,
|
|
|
|
.request_port = serial_m3110_request_port,
|
|
|
|
.config_port = serial_m3110_config_port,
|
|
|
|
.verify_port = serial_m3110_verify_port,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct uart_driver serial_m3110_reg = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.driver_name = "MRST serial",
|
|
|
|
.dev_name = "ttyS",
|
|
|
|
.major = TTY_MAJOR,
|
|
|
|
.minor = 64,
|
|
|
|
.nr = 1,
|
|
|
|
.cons = &serial_m3110_console,
|
|
|
|
};
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int serial_m3110_suspend(struct device *dev)
|
2024-09-09 08:52:07 +00:00
|
|
|
{
|
2024-09-09 08:57:42 +00:00
|
|
|
struct spi_device *spi = to_spi_device(dev);
|
2024-09-09 08:52:07 +00:00
|
|
|
struct uart_max3110 *max = spi_get_drvdata(spi);
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (max->irq > 0)
|
|
|
|
disable_irq(max->irq);
|
2024-09-09 08:52:07 +00:00
|
|
|
uart_suspend_port(&serial_m3110_reg, &max->port);
|
|
|
|
max3110_out(max, max->cur_conf | WC_SW_SHDI);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static int serial_m3110_resume(struct device *dev)
|
2024-09-09 08:52:07 +00:00
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{
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2024-09-09 08:57:42 +00:00
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struct spi_device *spi = to_spi_device(dev);
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2024-09-09 08:52:07 +00:00
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struct uart_max3110 *max = spi_get_drvdata(spi);
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max3110_out(max, max->cur_conf);
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uart_resume_port(&serial_m3110_reg, &max->port);
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2024-09-09 08:57:42 +00:00
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if (max->irq > 0)
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enable_irq(max->irq);
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2024-09-09 08:52:07 +00:00
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return 0;
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}
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2024-09-09 08:57:42 +00:00
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static SIMPLE_DEV_PM_OPS(serial_m3110_pm_ops, serial_m3110_suspend,
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serial_m3110_resume);
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#define SERIAL_M3110_PM_OPS (&serial_m3110_pm_ops)
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2024-09-09 08:52:07 +00:00
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#else
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2024-09-09 08:57:42 +00:00
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#define SERIAL_M3110_PM_OPS NULL
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2024-09-09 08:52:07 +00:00
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#endif
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2024-09-09 08:57:42 +00:00
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static int serial_m3110_probe(struct spi_device *spi)
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2024-09-09 08:52:07 +00:00
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{
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struct uart_max3110 *max;
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void *buffer;
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u16 res;
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int ret = 0;
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max = kzalloc(sizeof(*max), GFP_KERNEL);
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if (!max)
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return -ENOMEM;
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/* Set spi info */
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spi->bits_per_word = 16;
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max->clock = MAX3110_HIGH_CLK;
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spi_setup(spi);
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max->port.type = PORT_MAX3100;
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max->port.fifosize = 2; /* Only have 16b buffer */
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max->port.ops = &serial_m3110_ops;
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max->port.line = 0;
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max->port.dev = &spi->dev;
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max->port.uartclk = 115200;
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max->spi = spi;
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strcpy(max->name, spi->modalias);
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max->irq = (u16)spi->irq;
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mutex_init(&max->thread_mutex);
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2024-09-09 08:57:42 +00:00
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mutex_init(&max->io_mutex);
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2024-09-09 08:52:07 +00:00
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max->word_7bits = 0;
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max->parity = 0;
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max->baud = 0;
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max->cur_conf = 0;
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max->uart_flags = 0;
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/* Check if reading configuration register returns something sane */
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res = RC_TAG;
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ret = max3110_write_then_read(max, (u8 *)&res, (u8 *)&res, 2, 0);
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if (ret < 0 || res == 0 || res == 0xffff) {
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dev_dbg(&spi->dev, "MAX3111 deemed not present (conf reg %04x)",
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res);
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ret = -ENODEV;
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goto err_get_page;
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}
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buffer = (void *)__get_free_page(GFP_KERNEL);
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if (!buffer) {
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ret = -ENOMEM;
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goto err_get_page;
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}
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max->con_xmit.buf = buffer;
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max->con_xmit.head = 0;
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max->con_xmit.tail = 0;
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init_waitqueue_head(&max->wq);
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max->main_thread = kthread_run(max3110_main_thread,
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max, "max3110_main");
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if (IS_ERR(max->main_thread)) {
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ret = PTR_ERR(max->main_thread);
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goto err_kthread;
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}
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2024-09-09 08:57:42 +00:00
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if (max->irq) {
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ret = request_irq(max->irq, serial_m3110_irq,
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IRQ_TYPE_EDGE_FALLING, "max3110", max);
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if (ret) {
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max->irq = 0;
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dev_warn(&spi->dev,
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"unable to allocate IRQ, will use polling method\n");
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}
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}
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2024-09-09 08:52:07 +00:00
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spi_set_drvdata(spi, max);
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pmax = max;
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/* Give membase a psudo value to pass serial_core's check */
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2024-09-09 08:57:42 +00:00
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max->port.membase = (unsigned char __iomem *)0xff110000;
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2024-09-09 08:52:07 +00:00
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uart_add_one_port(&serial_m3110_reg, &max->port);
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return 0;
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err_kthread:
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free_page((unsigned long)buffer);
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err_get_page:
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kfree(max);
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return ret;
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}
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2024-09-09 08:57:42 +00:00
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static int serial_m3110_remove(struct spi_device *dev)
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2024-09-09 08:52:07 +00:00
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{
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struct uart_max3110 *max = spi_get_drvdata(dev);
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if (!max)
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return 0;
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uart_remove_one_port(&serial_m3110_reg, &max->port);
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free_page((unsigned long)max->con_xmit.buf);
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2024-09-09 08:57:42 +00:00
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if (max->irq)
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free_irq(max->irq, max);
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2024-09-09 08:52:07 +00:00
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if (max->main_thread)
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kthread_stop(max->main_thread);
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kfree(max);
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return 0;
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}
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static struct spi_driver uart_max3110_driver = {
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.driver = {
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.name = "spi_max3111",
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.owner = THIS_MODULE,
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2024-09-09 08:57:42 +00:00
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.pm = SERIAL_M3110_PM_OPS,
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2024-09-09 08:52:07 +00:00
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},
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.probe = serial_m3110_probe,
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2024-09-09 08:57:42 +00:00
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.remove = serial_m3110_remove,
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2024-09-09 08:52:07 +00:00
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};
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static int __init serial_m3110_init(void)
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{
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int ret = 0;
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ret = uart_register_driver(&serial_m3110_reg);
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if (ret)
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return ret;
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ret = spi_register_driver(&uart_max3110_driver);
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if (ret)
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uart_unregister_driver(&serial_m3110_reg);
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return ret;
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}
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static void __exit serial_m3110_exit(void)
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{
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spi_unregister_driver(&uart_max3110_driver);
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uart_unregister_driver(&serial_m3110_reg);
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}
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module_init(serial_m3110_init);
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module_exit(serial_m3110_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("spi:max3110-uart");
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