2024-09-09 08:52:07 +00:00
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/*
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* Atheros CARL9170 driver
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*
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* Basic HW register/memory/command access functions
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*
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* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
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* Copyright 2010, Christian Lamparter <chunkeey@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, see
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* http://www.gnu.org/licenses/.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* Copyright (c) 2007-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __CMD_H
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#define __CMD_H
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#include "carl9170.h"
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/* basic HW access */
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int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val);
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int carl9170_read_reg(struct ar9170 *ar, const u32 reg, u32 *val);
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int carl9170_read_mreg(struct ar9170 *ar, const int nregs,
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const u32 *regs, u32 *out);
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int carl9170_echo_test(struct ar9170 *ar, u32 v);
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int carl9170_reboot(struct ar9170 *ar);
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int carl9170_mac_reset(struct ar9170 *ar);
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int carl9170_powersave(struct ar9170 *ar, const bool power_on);
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int carl9170_collect_tally(struct ar9170 *ar);
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int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id,
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const u32 mode, const u32 addr, const u32 len);
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static inline int carl9170_flush_cab(struct ar9170 *ar,
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const unsigned int vif_id)
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{
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return carl9170_bcn_ctrl(ar, vif_id, CARL9170_BCN_CTRL_DRAIN, 0, 0);
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}
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static inline int carl9170_rx_filter(struct ar9170 *ar,
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const unsigned int _rx_filter)
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{
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__le32 rx_filter = cpu_to_le32(_rx_filter);
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return carl9170_exec_cmd(ar, CARL9170_CMD_RX_FILTER,
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sizeof(rx_filter), (u8 *)&rx_filter,
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0, NULL);
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}
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struct carl9170_cmd *carl9170_cmd_buf(struct ar9170 *ar,
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const enum carl9170_cmd_oids cmd, const unsigned int len);
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/*
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* Macros to facilitate writing multiple registers in a single
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* write-combining USB command. Note that when the first group
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* fails the whole thing will fail without any others attempted,
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* but you won't know which write in the group failed.
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*/
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#define carl9170_regwrite_begin(ar) \
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do { \
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int __nreg = 0, __err = 0; \
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struct ar9170 *__ar = ar;
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#define carl9170_regwrite(r, v) do { \
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__ar->cmd_buf[2 * __nreg + 1] = cpu_to_le32(r); \
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__ar->cmd_buf[2 * __nreg + 2] = cpu_to_le32(v); \
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__nreg++; \
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if ((__nreg >= PAYLOAD_MAX / 2)) { \
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if (IS_ACCEPTING_CMD(__ar)) \
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__err = carl9170_exec_cmd(__ar, \
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CARL9170_CMD_WREG, 8 * __nreg, \
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(u8 *) &__ar->cmd_buf[1], 0, NULL); \
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else \
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goto __regwrite_out; \
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\
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__nreg = 0; \
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if (__err) \
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goto __regwrite_out; \
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} \
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} while (0)
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#define carl9170_regwrite_finish() \
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__regwrite_out : \
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if (__err == 0 && __nreg) { \
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if (IS_ACCEPTING_CMD(__ar)) \
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__err = carl9170_exec_cmd(__ar, \
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CARL9170_CMD_WREG, 8 * __nreg, \
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(u8 *) &__ar->cmd_buf[1], 0, NULL); \
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__nreg = 0; \
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}
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#define carl9170_regwrite_result() \
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__err; \
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2024-09-09 08:57:42 +00:00
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} while (0)
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2024-09-09 08:52:07 +00:00
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#define carl9170_async_regwrite_get_buf() \
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do { \
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__nreg = 0; \
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__cmd = carl9170_cmd_buf(__carl, CARL9170_CMD_WREG_ASYNC, \
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CARL9170_MAX_CMD_PAYLOAD_LEN); \
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if (__cmd == NULL) { \
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__err = -ENOMEM; \
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goto __async_regwrite_out; \
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} \
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2024-09-09 08:57:42 +00:00
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} while (0)
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2024-09-09 08:52:07 +00:00
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#define carl9170_async_regwrite_begin(carl) \
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do { \
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struct ar9170 *__carl = carl; \
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struct carl9170_cmd *__cmd; \
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unsigned int __nreg; \
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int __err = 0; \
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carl9170_async_regwrite_get_buf(); \
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#define carl9170_async_regwrite_flush() \
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do { \
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if (__cmd == NULL || __nreg == 0) \
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break; \
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\
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if (IS_ACCEPTING_CMD(__carl) && __nreg) { \
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__cmd->hdr.len = 8 * __nreg; \
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__err = __carl9170_exec_cmd(__carl, __cmd, true); \
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__cmd = NULL; \
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break; \
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} \
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goto __async_regwrite_out; \
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} while (0)
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#define carl9170_async_regwrite(r, v) do { \
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if (__cmd == NULL) \
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carl9170_async_regwrite_get_buf(); \
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__cmd->wreg.regs[__nreg].addr = cpu_to_le32(r); \
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__cmd->wreg.regs[__nreg].val = cpu_to_le32(v); \
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__nreg++; \
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if ((__nreg >= PAYLOAD_MAX / 2)) \
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carl9170_async_regwrite_flush(); \
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} while (0)
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#define carl9170_async_regwrite_finish() do { \
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__async_regwrite_out: \
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if (__cmd != NULL && __err == 0) \
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carl9170_async_regwrite_flush(); \
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kfree(__cmd); \
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} while (0) \
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#define carl9170_async_regwrite_result() \
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__err; \
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2024-09-09 08:57:42 +00:00
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} while (0)
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2024-09-09 08:52:07 +00:00
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#endif /* __CMD_H */
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