615 lines
14 KiB
C
615 lines
14 KiB
C
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/*
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* Elonics E4000 silicon tuner driver
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*
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* Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "e4000_priv.h"
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#include <linux/math64.h>
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static int e4000_init(struct dvb_frontend *fe)
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{
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struct e4000 *s = fe->tuner_priv;
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int ret;
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dev_dbg(&s->client->dev, "\n");
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/* dummy I2C to ensure I2C wakes up */
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ret = regmap_write(s->regmap, 0x02, 0x40);
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/* reset */
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ret = regmap_write(s->regmap, 0x00, 0x01);
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if (ret)
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goto err;
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/* disable output clock */
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ret = regmap_write(s->regmap, 0x06, 0x00);
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if (ret)
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goto err;
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ret = regmap_write(s->regmap, 0x7a, 0x96);
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if (ret)
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goto err;
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/* configure gains */
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ret = regmap_bulk_write(s->regmap, 0x7e, "\x01\xfe", 2);
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if (ret)
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goto err;
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ret = regmap_write(s->regmap, 0x82, 0x00);
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if (ret)
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goto err;
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ret = regmap_write(s->regmap, 0x24, 0x05);
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if (ret)
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goto err;
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ret = regmap_bulk_write(s->regmap, 0x87, "\x20\x01", 2);
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if (ret)
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goto err;
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ret = regmap_bulk_write(s->regmap, 0x9f, "\x7f\x07", 2);
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if (ret)
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goto err;
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/* DC offset control */
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ret = regmap_write(s->regmap, 0x2d, 0x1f);
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if (ret)
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goto err;
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ret = regmap_bulk_write(s->regmap, 0x70, "\x01\x01", 2);
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if (ret)
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goto err;
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/* gain control */
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ret = regmap_write(s->regmap, 0x1a, 0x17);
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if (ret)
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goto err;
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ret = regmap_write(s->regmap, 0x1f, 0x1a);
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if (ret)
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goto err;
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s->active = true;
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err:
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if (ret)
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dev_dbg(&s->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int e4000_sleep(struct dvb_frontend *fe)
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{
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struct e4000 *s = fe->tuner_priv;
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int ret;
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dev_dbg(&s->client->dev, "\n");
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s->active = false;
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ret = regmap_write(s->regmap, 0x00, 0x00);
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if (ret)
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goto err;
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err:
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if (ret)
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dev_dbg(&s->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int e4000_set_params(struct dvb_frontend *fe)
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{
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struct e4000 *s = fe->tuner_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret, i, sigma_delta;
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unsigned int pll_n, pll_f;
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u64 f_vco;
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u8 buf[5], i_data[4], q_data[4];
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dev_dbg(&s->client->dev,
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"delivery_system=%d frequency=%u bandwidth_hz=%u\n",
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c->delivery_system, c->frequency, c->bandwidth_hz);
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/* gain control manual */
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ret = regmap_write(s->regmap, 0x1a, 0x00);
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if (ret)
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goto err;
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/* PLL */
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for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
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if (c->frequency <= e4000_pll_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e4000_pll_lut)) {
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ret = -EINVAL;
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goto err;
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}
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f_vco = 1ull * c->frequency * e4000_pll_lut[i].mul;
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pll_n = div_u64_rem(f_vco, s->clock, &pll_f);
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sigma_delta = div_u64(0x10000ULL * pll_f, s->clock);
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buf[0] = pll_n;
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buf[1] = (sigma_delta >> 0) & 0xff;
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buf[2] = (sigma_delta >> 8) & 0xff;
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buf[3] = 0x00;
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buf[4] = e4000_pll_lut[i].div;
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dev_dbg(&s->client->dev, "f_vco=%llu pll div=%d sigma_delta=%04x\n",
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f_vco, buf[0], sigma_delta);
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ret = regmap_bulk_write(s->regmap, 0x09, buf, 5);
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if (ret)
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goto err;
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/* LNA filter (RF filter) */
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for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
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if (c->frequency <= e400_lna_filter_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
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ret = -EINVAL;
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goto err;
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}
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ret = regmap_write(s->regmap, 0x10, e400_lna_filter_lut[i].val);
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if (ret)
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goto err;
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/* IF filters */
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for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
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if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
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ret = -EINVAL;
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goto err;
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}
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buf[0] = e4000_if_filter_lut[i].reg11_val;
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buf[1] = e4000_if_filter_lut[i].reg12_val;
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ret = regmap_bulk_write(s->regmap, 0x11, buf, 2);
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if (ret)
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goto err;
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/* frequency band */
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for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
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if (c->frequency <= e4000_band_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e4000_band_lut)) {
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ret = -EINVAL;
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goto err;
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}
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ret = regmap_write(s->regmap, 0x07, e4000_band_lut[i].reg07_val);
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if (ret)
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goto err;
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ret = regmap_write(s->regmap, 0x78, e4000_band_lut[i].reg78_val);
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if (ret)
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goto err;
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/* DC offset */
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for (i = 0; i < 4; i++) {
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if (i == 0)
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ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7e\x24", 3);
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else if (i == 1)
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ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7f", 2);
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else if (i == 2)
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ret = regmap_bulk_write(s->regmap, 0x15, "\x01", 1);
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else
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ret = regmap_bulk_write(s->regmap, 0x16, "\x7e", 1);
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if (ret)
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goto err;
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ret = regmap_write(s->regmap, 0x29, 0x01);
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if (ret)
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goto err;
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ret = regmap_bulk_read(s->regmap, 0x2a, buf, 3);
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if (ret)
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goto err;
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i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
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q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
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}
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swap(q_data[2], q_data[3]);
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swap(i_data[2], i_data[3]);
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ret = regmap_bulk_write(s->regmap, 0x50, q_data, 4);
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if (ret)
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goto err;
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ret = regmap_bulk_write(s->regmap, 0x60, i_data, 4);
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if (ret)
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goto err;
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/* gain control auto */
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ret = regmap_write(s->regmap, 0x1a, 0x17);
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if (ret)
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goto err;
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err:
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if (ret)
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dev_dbg(&s->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct e4000 *s = fe->tuner_priv;
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dev_dbg(&s->client->dev, "\n");
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*frequency = 0; /* Zero-IF */
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return 0;
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}
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#if IS_ENABLED(CONFIG_VIDEO_V4L2)
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static int e4000_set_lna_gain(struct dvb_frontend *fe)
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{
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struct e4000 *s = fe->tuner_priv;
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int ret;
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u8 u8tmp;
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dev_dbg(&s->client->dev, "lna auto=%d->%d val=%d->%d\n",
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s->lna_gain_auto->cur.val, s->lna_gain_auto->val,
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s->lna_gain->cur.val, s->lna_gain->val);
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if (s->lna_gain_auto->val && s->if_gain_auto->cur.val)
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u8tmp = 0x17;
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else if (s->lna_gain_auto->val)
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u8tmp = 0x19;
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else if (s->if_gain_auto->cur.val)
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u8tmp = 0x16;
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else
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u8tmp = 0x10;
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ret = regmap_write(s->regmap, 0x1a, u8tmp);
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if (ret)
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goto err;
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if (s->lna_gain_auto->val == false) {
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ret = regmap_write(s->regmap, 0x14, s->lna_gain->val);
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if (ret)
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goto err;
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}
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err:
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if (ret)
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dev_dbg(&s->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int e4000_set_mixer_gain(struct dvb_frontend *fe)
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{
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struct e4000 *s = fe->tuner_priv;
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int ret;
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u8 u8tmp;
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dev_dbg(&s->client->dev, "mixer auto=%d->%d val=%d->%d\n",
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s->mixer_gain_auto->cur.val, s->mixer_gain_auto->val,
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s->mixer_gain->cur.val, s->mixer_gain->val);
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if (s->mixer_gain_auto->val)
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u8tmp = 0x15;
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else
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u8tmp = 0x14;
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ret = regmap_write(s->regmap, 0x20, u8tmp);
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if (ret)
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goto err;
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if (s->mixer_gain_auto->val == false) {
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ret = regmap_write(s->regmap, 0x15, s->mixer_gain->val);
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if (ret)
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goto err;
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}
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err:
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if (ret)
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dev_dbg(&s->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int e4000_set_if_gain(struct dvb_frontend *fe)
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{
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struct e4000 *s = fe->tuner_priv;
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int ret;
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u8 buf[2];
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u8 u8tmp;
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dev_dbg(&s->client->dev, "if auto=%d->%d val=%d->%d\n",
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s->if_gain_auto->cur.val, s->if_gain_auto->val,
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s->if_gain->cur.val, s->if_gain->val);
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if (s->if_gain_auto->val && s->lna_gain_auto->cur.val)
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u8tmp = 0x17;
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else if (s->lna_gain_auto->cur.val)
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u8tmp = 0x19;
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else if (s->if_gain_auto->val)
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u8tmp = 0x16;
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else
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u8tmp = 0x10;
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ret = regmap_write(s->regmap, 0x1a, u8tmp);
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if (ret)
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goto err;
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if (s->if_gain_auto->val == false) {
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buf[0] = e4000_if_gain_lut[s->if_gain->val].reg16_val;
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buf[1] = e4000_if_gain_lut[s->if_gain->val].reg17_val;
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ret = regmap_bulk_write(s->regmap, 0x16, buf, 2);
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if (ret)
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goto err;
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}
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err:
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if (ret)
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|
|
dev_dbg(&s->client->dev, "failed=%d\n", ret);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int e4000_pll_lock(struct dvb_frontend *fe)
|
||
|
|
{
|
||
|
|
struct e4000 *s = fe->tuner_priv;
|
||
|
|
int ret;
|
||
|
|
unsigned int utmp;
|
||
|
|
|
||
|
|
ret = regmap_read(s->regmap, 0x07, &utmp);
|
||
|
|
if (ret)
|
||
|
|
goto err;
|
||
|
|
|
||
|
|
s->pll_lock->val = (utmp & 0x01);
|
||
|
|
err:
|
||
|
|
if (ret)
|
||
|
|
dev_dbg(&s->client->dev, "failed=%d\n", ret);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
|
||
|
|
{
|
||
|
|
struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (!s->active)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
switch (ctrl->id) {
|
||
|
|
case V4L2_CID_RF_TUNER_PLL_LOCK:
|
||
|
|
ret = e4000_pll_lock(s->fe);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
dev_dbg(&s->client->dev, "unknown ctrl: id=%d name=%s\n",
|
||
|
|
ctrl->id, ctrl->name);
|
||
|
|
ret = -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
|
||
|
|
{
|
||
|
|
struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
|
||
|
|
struct dvb_frontend *fe = s->fe;
|
||
|
|
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (!s->active)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
switch (ctrl->id) {
|
||
|
|
case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
|
||
|
|
case V4L2_CID_RF_TUNER_BANDWIDTH:
|
||
|
|
c->bandwidth_hz = s->bandwidth->val;
|
||
|
|
ret = e4000_set_params(s->fe);
|
||
|
|
break;
|
||
|
|
case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
|
||
|
|
case V4L2_CID_RF_TUNER_LNA_GAIN:
|
||
|
|
ret = e4000_set_lna_gain(s->fe);
|
||
|
|
break;
|
||
|
|
case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
|
||
|
|
case V4L2_CID_RF_TUNER_MIXER_GAIN:
|
||
|
|
ret = e4000_set_mixer_gain(s->fe);
|
||
|
|
break;
|
||
|
|
case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
|
||
|
|
case V4L2_CID_RF_TUNER_IF_GAIN:
|
||
|
|
ret = e4000_set_if_gain(s->fe);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
dev_dbg(&s->client->dev, "unknown ctrl: id=%d name=%s\n",
|
||
|
|
ctrl->id, ctrl->name);
|
||
|
|
ret = -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
|
||
|
|
.g_volatile_ctrl = e4000_g_volatile_ctrl,
|
||
|
|
.s_ctrl = e4000_s_ctrl,
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static const struct dvb_tuner_ops e4000_tuner_ops = {
|
||
|
|
.info = {
|
||
|
|
.name = "Elonics E4000",
|
||
|
|
.frequency_min = 174000000,
|
||
|
|
.frequency_max = 862000000,
|
||
|
|
},
|
||
|
|
|
||
|
|
.init = e4000_init,
|
||
|
|
.sleep = e4000_sleep,
|
||
|
|
.set_params = e4000_set_params,
|
||
|
|
|
||
|
|
.get_if_frequency = e4000_get_if_frequency,
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Use V4L2 subdev to carry V4L2 control handler, even we don't implement
|
||
|
|
* subdev itself, just to avoid reinventing the wheel.
|
||
|
|
*/
|
||
|
|
static int e4000_probe(struct i2c_client *client,
|
||
|
|
const struct i2c_device_id *id)
|
||
|
|
{
|
||
|
|
struct e4000_config *cfg = client->dev.platform_data;
|
||
|
|
struct dvb_frontend *fe = cfg->fe;
|
||
|
|
struct e4000 *s;
|
||
|
|
int ret;
|
||
|
|
unsigned int utmp;
|
||
|
|
static const struct regmap_config regmap_config = {
|
||
|
|
.reg_bits = 8,
|
||
|
|
.val_bits = 8,
|
||
|
|
.max_register = 0xff,
|
||
|
|
};
|
||
|
|
|
||
|
|
s = kzalloc(sizeof(struct e4000), GFP_KERNEL);
|
||
|
|
if (!s) {
|
||
|
|
ret = -ENOMEM;
|
||
|
|
dev_err(&client->dev, "kzalloc() failed\n");
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
s->clock = cfg->clock;
|
||
|
|
s->client = client;
|
||
|
|
s->fe = cfg->fe;
|
||
|
|
s->regmap = devm_regmap_init_i2c(client, ®map_config);
|
||
|
|
if (IS_ERR(s->regmap)) {
|
||
|
|
ret = PTR_ERR(s->regmap);
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* check if the tuner is there */
|
||
|
|
ret = regmap_read(s->regmap, 0x02, &utmp);
|
||
|
|
if (ret)
|
||
|
|
goto err;
|
||
|
|
|
||
|
|
dev_dbg(&s->client->dev, "chip id=%02x\n", utmp);
|
||
|
|
|
||
|
|
if (utmp != 0x40) {
|
||
|
|
ret = -ENODEV;
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* put sleep as chip seems to be in normal mode by default */
|
||
|
|
ret = regmap_write(s->regmap, 0x00, 0x00);
|
||
|
|
if (ret)
|
||
|
|
goto err;
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_VIDEO_V4L2)
|
||
|
|
/* Register controls */
|
||
|
|
v4l2_ctrl_handler_init(&s->hdl, 9);
|
||
|
|
s->bandwidth_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
|
||
|
|
s->bandwidth = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
|
||
|
|
v4l2_ctrl_auto_cluster(2, &s->bandwidth_auto, 0, false);
|
||
|
|
s->lna_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
|
||
|
|
s->lna_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
|
||
|
|
v4l2_ctrl_auto_cluster(2, &s->lna_gain_auto, 0, false);
|
||
|
|
s->mixer_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
|
||
|
|
s->mixer_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
|
||
|
|
v4l2_ctrl_auto_cluster(2, &s->mixer_gain_auto, 0, false);
|
||
|
|
s->if_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
|
||
|
|
s->if_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
|
||
|
|
v4l2_ctrl_auto_cluster(2, &s->if_gain_auto, 0, false);
|
||
|
|
s->pll_lock = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
|
||
|
|
V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
|
||
|
|
if (s->hdl.error) {
|
||
|
|
ret = s->hdl.error;
|
||
|
|
dev_err(&s->client->dev, "Could not initialize controls\n");
|
||
|
|
v4l2_ctrl_handler_free(&s->hdl);
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
s->sd.ctrl_handler = &s->hdl;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
dev_info(&s->client->dev, "Elonics E4000 successfully identified\n");
|
||
|
|
|
||
|
|
fe->tuner_priv = s;
|
||
|
|
memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
|
||
|
|
sizeof(struct dvb_tuner_ops));
|
||
|
|
|
||
|
|
v4l2_set_subdevdata(&s->sd, client);
|
||
|
|
i2c_set_clientdata(client, &s->sd);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
err:
|
||
|
|
if (ret) {
|
||
|
|
dev_dbg(&client->dev, "failed=%d\n", ret);
|
||
|
|
kfree(s);
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int e4000_remove(struct i2c_client *client)
|
||
|
|
{
|
||
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
||
|
|
struct e4000 *s = container_of(sd, struct e4000, sd);
|
||
|
|
struct dvb_frontend *fe = s->fe;
|
||
|
|
|
||
|
|
dev_dbg(&client->dev, "\n");
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_VIDEO_V4L2)
|
||
|
|
v4l2_ctrl_handler_free(&s->hdl);
|
||
|
|
#endif
|
||
|
|
memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
|
||
|
|
fe->tuner_priv = NULL;
|
||
|
|
kfree(s);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct i2c_device_id e4000_id[] = {
|
||
|
|
{"e4000", 0},
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(i2c, e4000_id);
|
||
|
|
|
||
|
|
static struct i2c_driver e4000_driver = {
|
||
|
|
.driver = {
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
.name = "e4000",
|
||
|
|
},
|
||
|
|
.probe = e4000_probe,
|
||
|
|
.remove = e4000_remove,
|
||
|
|
.id_table = e4000_id,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_i2c_driver(e4000_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
|
||
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
||
|
|
MODULE_LICENSE("GPL");
|