643 lines
15 KiB
C
643 lines
15 KiB
C
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/*
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* AHCI SATA platform library
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*
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* Copyright 2004-2005 Red Hat, Inc.
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* Jeff Garzik <jgarzik@pobox.com>
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* Copyright 2010 MontaVista Software, LLC.
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*/
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/gfp.h>
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/libata.h>
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#include <linux/ahci_platform.h>
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#include <linux/phy/phy.h>
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#include <linux/pm_runtime.h>
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#include "ahci.h"
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static void ahci_host_stop(struct ata_host *host);
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struct ata_port_operations ahci_platform_ops = {
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.inherits = &ahci_ops,
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.host_stop = ahci_host_stop,
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};
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EXPORT_SYMBOL_GPL(ahci_platform_ops);
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static struct scsi_host_template ahci_platform_sht = {
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AHCI_SHT("ahci_platform"),
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};
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/**
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* ahci_platform_enable_phys - Enable PHYs
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* @hpriv: host private area to store config values
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*
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* This function enables all the PHYs found in hpriv->phys, if any.
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* If a PHY fails to be enabled, it disables all the PHYs already
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* enabled in reverse order and returns an error.
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*
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* RETURNS:
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* 0 on success otherwise a negative error code
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*/
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static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
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{
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int rc, i;
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for (i = 0; i < hpriv->nports; i++) {
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if (!hpriv->phys[i])
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continue;
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rc = phy_init(hpriv->phys[i]);
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if (rc)
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goto disable_phys;
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rc = phy_power_on(hpriv->phys[i]);
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if (rc) {
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phy_exit(hpriv->phys[i]);
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goto disable_phys;
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}
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}
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return 0;
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disable_phys:
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while (--i >= 0) {
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phy_power_off(hpriv->phys[i]);
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phy_exit(hpriv->phys[i]);
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}
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return rc;
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}
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/**
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* ahci_platform_disable_phys - Disable PHYs
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* @hpriv: host private area to store config values
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*
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* This function disables all PHYs found in hpriv->phys.
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*/
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static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
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{
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int i;
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for (i = 0; i < hpriv->nports; i++) {
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if (!hpriv->phys[i])
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continue;
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phy_power_off(hpriv->phys[i]);
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phy_exit(hpriv->phys[i]);
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}
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}
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/**
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* ahci_platform_enable_clks - Enable platform clocks
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* @hpriv: host private area to store config values
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*
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* This function enables all the clks found in hpriv->clks, starting at
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* index 0. If any clk fails to enable it disables all the clks already
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* enabled in reverse order, and then returns an error.
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*
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* RETURNS:
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* 0 on success otherwise a negative error code
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*/
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int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
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{
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int c, rc;
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for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
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rc = clk_prepare_enable(hpriv->clks[c]);
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if (rc)
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goto disable_unprepare_clk;
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}
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return 0;
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disable_unprepare_clk:
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while (--c >= 0)
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clk_disable_unprepare(hpriv->clks[c]);
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return rc;
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}
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EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
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/**
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* ahci_platform_disable_clks - Disable platform clocks
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* @hpriv: host private area to store config values
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*
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* This function disables all the clks found in hpriv->clks, in reverse
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* order of ahci_platform_enable_clks (starting at the end of the array).
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*/
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void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
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{
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int c;
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for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
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if (hpriv->clks[c])
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clk_disable_unprepare(hpriv->clks[c]);
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}
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EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
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/**
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* ahci_platform_enable_resources - Enable platform resources
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* @hpriv: host private area to store config values
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*
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* This function enables all ahci_platform managed resources in the
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* following order:
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* 1) Regulator
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* 2) Clocks (through ahci_platform_enable_clks)
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* 3) Phys
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*
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* If resource enabling fails at any point the previous enabled resources
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* are disabled in reverse order.
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*
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* RETURNS:
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* 0 on success otherwise a negative error code
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*/
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int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
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{
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int rc;
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if (hpriv->target_pwr) {
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rc = regulator_enable(hpriv->target_pwr);
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if (rc)
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return rc;
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}
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rc = ahci_platform_enable_clks(hpriv);
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if (rc)
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goto disable_regulator;
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rc = ahci_platform_enable_phys(hpriv);
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if (rc)
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goto disable_clks;
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return 0;
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disable_clks:
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ahci_platform_disable_clks(hpriv);
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disable_regulator:
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if (hpriv->target_pwr)
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regulator_disable(hpriv->target_pwr);
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return rc;
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}
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EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
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/**
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* ahci_platform_disable_resources - Disable platform resources
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* @hpriv: host private area to store config values
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*
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* This function disables all ahci_platform managed resources in the
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* following order:
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* 1) Phys
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* 2) Clocks (through ahci_platform_disable_clks)
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* 3) Regulator
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*/
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void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
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{
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ahci_platform_disable_phys(hpriv);
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ahci_platform_disable_clks(hpriv);
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if (hpriv->target_pwr)
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regulator_disable(hpriv->target_pwr);
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}
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EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
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static void ahci_platform_put_resources(struct device *dev, void *res)
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{
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struct ahci_host_priv *hpriv = res;
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int c;
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if (hpriv->got_runtime_pm) {
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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}
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for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
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clk_put(hpriv->clks[c]);
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}
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/**
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* ahci_platform_get_resources - Get platform resources
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* @pdev: platform device to get resources for
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*
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* This function allocates an ahci_host_priv struct, and gets the following
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* resources, storing a reference to them inside the returned struct:
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*
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* 1) mmio registers (IORESOURCE_MEM 0, mandatory)
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* 2) regulator for controlling the targets power (optional)
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* 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
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* or for non devicetree enabled platforms a single clock
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* 4) phys (optional)
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*
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* RETURNS:
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* The allocated ahci_host_priv on success, otherwise an ERR_PTR value
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*/
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struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct ahci_host_priv *hpriv;
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struct clk *clk;
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struct device_node *child;
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int i, enabled_ports = 0, rc = -ENOMEM;
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u32 mask_port_map = 0;
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if (!devres_open_group(dev, NULL, GFP_KERNEL))
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return ERR_PTR(-ENOMEM);
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hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
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GFP_KERNEL);
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if (!hpriv)
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goto err_out;
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devres_add(dev, hpriv);
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hpriv->mmio = devm_ioremap_resource(dev,
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platform_get_resource(pdev, IORESOURCE_MEM, 0));
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if (IS_ERR(hpriv->mmio)) {
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dev_err(dev, "no mmio space\n");
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rc = PTR_ERR(hpriv->mmio);
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goto err_out;
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}
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hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
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if (IS_ERR(hpriv->target_pwr)) {
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rc = PTR_ERR(hpriv->target_pwr);
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if (rc == -EPROBE_DEFER)
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goto err_out;
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hpriv->target_pwr = NULL;
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}
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for (i = 0; i < AHCI_MAX_CLKS; i++) {
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/*
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* For now we must use clk_get(dev, NULL) for the first clock,
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* because some platforms (da850, spear13xx) are not yet
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* converted to use devicetree for clocks. For new platforms
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* this is equivalent to of_clk_get(dev->of_node, 0).
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*/
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if (i == 0)
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clk = clk_get(dev, NULL);
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else
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clk = of_clk_get(dev->of_node, i);
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if (IS_ERR(clk)) {
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rc = PTR_ERR(clk);
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if (rc == -EPROBE_DEFER)
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goto err_out;
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break;
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}
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hpriv->clks[i] = clk;
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}
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hpriv->nports = of_get_child_count(dev->of_node);
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if (hpriv->nports) {
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hpriv->phys = devm_kzalloc(dev,
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hpriv->nports * sizeof(*hpriv->phys),
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GFP_KERNEL);
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if (!hpriv->phys) {
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rc = -ENOMEM;
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goto err_out;
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}
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for_each_child_of_node(dev->of_node, child) {
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u32 port;
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if (!of_device_is_available(child))
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continue;
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if (of_property_read_u32(child, "reg", &port)) {
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rc = -EINVAL;
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goto err_out;
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}
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if (port >= hpriv->nports) {
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dev_warn(dev, "invalid port number %d\n", port);
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continue;
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}
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mask_port_map |= BIT(port);
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hpriv->phys[port] = devm_of_phy_get(dev, child, NULL);
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if (IS_ERR(hpriv->phys[port])) {
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rc = PTR_ERR(hpriv->phys[port]);
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dev_err(dev,
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"couldn't get PHY in node %s: %d\n",
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child->name, rc);
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goto err_out;
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}
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enabled_ports++;
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}
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if (!enabled_ports) {
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dev_warn(dev, "No port enabled\n");
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rc = -ENODEV;
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goto err_out;
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}
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if (!hpriv->mask_port_map)
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hpriv->mask_port_map = mask_port_map;
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} else {
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/*
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* If no sub-node was found, keep this for device tree
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* compatibility
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*/
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struct phy *phy = devm_phy_get(dev, "sata-phy");
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if (!IS_ERR(phy)) {
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hpriv->phys = devm_kzalloc(dev, sizeof(*hpriv->phys),
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GFP_KERNEL);
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if (!hpriv->phys) {
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rc = -ENOMEM;
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goto err_out;
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}
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hpriv->phys[0] = phy;
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hpriv->nports = 1;
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} else {
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rc = PTR_ERR(phy);
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switch (rc) {
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case -ENOSYS:
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/* No PHY support. Check if PHY is required. */
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if (of_find_property(dev->of_node, "phys", NULL)) {
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dev_err(dev, "couldn't get sata-phy: ENOSYS\n");
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goto err_out;
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}
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case -ENODEV:
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/* continue normally */
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hpriv->phys = NULL;
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break;
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default:
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goto err_out;
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}
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}
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}
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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hpriv->got_runtime_pm = true;
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devres_remove_group(dev, NULL);
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return hpriv;
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err_out:
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devres_release_group(dev, NULL);
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return ERR_PTR(rc);
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}
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EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
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/**
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* ahci_platform_init_host - Bring up an ahci-platform host
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* @pdev: platform device pointer for the host
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* @hpriv: ahci-host private data for the host
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* @pi_template: template for the ata_port_info to use
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*
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* This function does all the usual steps needed to bring up an
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* ahci-platform host, note any necessary resources (ie clks, phys, etc.)
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* must be initialized / enabled before calling this.
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*
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* RETURNS:
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* 0 on success otherwise a negative error code
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*/
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int ahci_platform_init_host(struct platform_device *pdev,
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struct ahci_host_priv *hpriv,
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const struct ata_port_info *pi_template)
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{
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struct device *dev = &pdev->dev;
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struct ata_port_info pi = *pi_template;
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const struct ata_port_info *ppi[] = { &pi, NULL };
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struct ata_host *host;
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int i, irq, n_ports, rc;
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_err(dev, "no irq\n");
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return -EINVAL;
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}
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/* prepare host */
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pi.private_data = (void *)(unsigned long)hpriv->flags;
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ahci_save_initial_config(dev, hpriv);
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if (hpriv->cap & HOST_CAP_NCQ)
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pi.flags |= ATA_FLAG_NCQ;
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if (hpriv->cap & HOST_CAP_PMP)
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pi.flags |= ATA_FLAG_PMP;
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ahci_set_em_messages(hpriv, &pi);
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/* CAP.NP sometimes indicate the index of the last enabled
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* port, at other times, that of the last possible port, so
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* determining the maximum port number requires looking at
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* both CAP.NP and port_map.
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*/
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n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
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||
|
host = ata_host_alloc_pinfo(dev, ppi, n_ports);
|
||
|
if (!host)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
host->private_data = hpriv;
|
||
|
|
||
|
if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
|
||
|
host->flags |= ATA_HOST_PARALLEL_SCAN;
|
||
|
else
|
||
|
dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
|
||
|
|
||
|
if (pi.flags & ATA_FLAG_EM)
|
||
|
ahci_reset_em(host);
|
||
|
|
||
|
for (i = 0; i < host->n_ports; i++) {
|
||
|
struct ata_port *ap = host->ports[i];
|
||
|
|
||
|
ata_port_desc(ap, "mmio %pR",
|
||
|
platform_get_resource(pdev, IORESOURCE_MEM, 0));
|
||
|
ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
|
||
|
|
||
|
/* set enclosure management message type */
|
||
|
if (ap->flags & ATA_FLAG_EM)
|
||
|
ap->em_message_type = hpriv->em_msg_type;
|
||
|
|
||
|
/* disabled/not-implemented port */
|
||
|
if (!(hpriv->port_map & (1 << i)))
|
||
|
ap->ops = &ata_dummy_port_ops;
|
||
|
}
|
||
|
|
||
|
if (hpriv->cap & HOST_CAP_64) {
|
||
|
rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
|
||
|
if (rc) {
|
||
|
rc = dma_coerce_mask_and_coherent(dev,
|
||
|
DMA_BIT_MASK(32));
|
||
|
if (rc) {
|
||
|
dev_err(dev, "Failed to enable 64-bit DMA.\n");
|
||
|
return rc;
|
||
|
}
|
||
|
dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
|
||
|
}
|
||
|
}
|
||
|
|
||
|
rc = ahci_reset_controller(host);
|
||
|
if (rc)
|
||
|
return rc;
|
||
|
|
||
|
ahci_init_controller(host);
|
||
|
ahci_print_info(host, "platform");
|
||
|
|
||
|
return ahci_host_activate(host, irq, &ahci_platform_sht);
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(ahci_platform_init_host);
|
||
|
|
||
|
static void ahci_host_stop(struct ata_host *host)
|
||
|
{
|
||
|
struct ahci_host_priv *hpriv = host->private_data;
|
||
|
|
||
|
ahci_platform_disable_resources(hpriv);
|
||
|
}
|
||
|
|
||
|
#ifdef CONFIG_PM_SLEEP
|
||
|
/**
|
||
|
* ahci_platform_suspend_host - Suspend an ahci-platform host
|
||
|
* @dev: device pointer for the host
|
||
|
*
|
||
|
* This function does all the usual steps needed to suspend an
|
||
|
* ahci-platform host, note any necessary resources (ie clks, phys, etc.)
|
||
|
* must be disabled after calling this.
|
||
|
*
|
||
|
* RETURNS:
|
||
|
* 0 on success otherwise a negative error code
|
||
|
*/
|
||
|
int ahci_platform_suspend_host(struct device *dev)
|
||
|
{
|
||
|
struct ata_host *host = dev_get_drvdata(dev);
|
||
|
struct ahci_host_priv *hpriv = host->private_data;
|
||
|
void __iomem *mmio = hpriv->mmio;
|
||
|
u32 ctl;
|
||
|
|
||
|
if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
|
||
|
dev_err(dev, "firmware update required for suspend/resume\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* AHCI spec rev1.1 section 8.3.3:
|
||
|
* Software must disable interrupts prior to requesting a
|
||
|
* transition of the HBA to D3 state.
|
||
|
*/
|
||
|
ctl = readl(mmio + HOST_CTL);
|
||
|
ctl &= ~HOST_IRQ_EN;
|
||
|
writel(ctl, mmio + HOST_CTL);
|
||
|
readl(mmio + HOST_CTL); /* flush */
|
||
|
|
||
|
return ata_host_suspend(host, PMSG_SUSPEND);
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
|
||
|
|
||
|
/**
|
||
|
* ahci_platform_resume_host - Resume an ahci-platform host
|
||
|
* @dev: device pointer for the host
|
||
|
*
|
||
|
* This function does all the usual steps needed to resume an ahci-platform
|
||
|
* host, note any necessary resources (ie clks, phys, etc.) must be
|
||
|
* initialized / enabled before calling this.
|
||
|
*
|
||
|
* RETURNS:
|
||
|
* 0 on success otherwise a negative error code
|
||
|
*/
|
||
|
int ahci_platform_resume_host(struct device *dev)
|
||
|
{
|
||
|
struct ata_host *host = dev_get_drvdata(dev);
|
||
|
int rc;
|
||
|
|
||
|
if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
|
||
|
rc = ahci_reset_controller(host);
|
||
|
if (rc)
|
||
|
return rc;
|
||
|
|
||
|
ahci_init_controller(host);
|
||
|
}
|
||
|
|
||
|
ata_host_resume(host);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
|
||
|
|
||
|
/**
|
||
|
* ahci_platform_suspend - Suspend an ahci-platform device
|
||
|
* @dev: the platform device to suspend
|
||
|
*
|
||
|
* This function suspends the host associated with the device, followed by
|
||
|
* disabling all the resources of the device.
|
||
|
*
|
||
|
* RETURNS:
|
||
|
* 0 on success otherwise a negative error code
|
||
|
*/
|
||
|
int ahci_platform_suspend(struct device *dev)
|
||
|
{
|
||
|
struct ata_host *host = dev_get_drvdata(dev);
|
||
|
struct ahci_host_priv *hpriv = host->private_data;
|
||
|
int rc;
|
||
|
|
||
|
rc = ahci_platform_suspend_host(dev);
|
||
|
if (rc)
|
||
|
return rc;
|
||
|
|
||
|
ahci_platform_disable_resources(hpriv);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(ahci_platform_suspend);
|
||
|
|
||
|
/**
|
||
|
* ahci_platform_resume - Resume an ahci-platform device
|
||
|
* @dev: the platform device to resume
|
||
|
*
|
||
|
* This function enables all the resources of the device followed by
|
||
|
* resuming the host associated with the device.
|
||
|
*
|
||
|
* RETURNS:
|
||
|
* 0 on success otherwise a negative error code
|
||
|
*/
|
||
|
int ahci_platform_resume(struct device *dev)
|
||
|
{
|
||
|
struct ata_host *host = dev_get_drvdata(dev);
|
||
|
struct ahci_host_priv *hpriv = host->private_data;
|
||
|
int rc;
|
||
|
|
||
|
rc = ahci_platform_enable_resources(hpriv);
|
||
|
if (rc)
|
||
|
return rc;
|
||
|
|
||
|
rc = ahci_platform_resume_host(dev);
|
||
|
if (rc)
|
||
|
goto disable_resources;
|
||
|
|
||
|
/* We resumed so update PM runtime state */
|
||
|
pm_runtime_disable(dev);
|
||
|
pm_runtime_set_active(dev);
|
||
|
pm_runtime_enable(dev);
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
disable_resources:
|
||
|
ahci_platform_disable_resources(hpriv);
|
||
|
|
||
|
return rc;
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(ahci_platform_resume);
|
||
|
#endif
|
||
|
|
||
|
MODULE_DESCRIPTION("AHCI SATA platform library");
|
||
|
MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
|
||
|
MODULE_LICENSE("GPL");
|