191 lines
5.1 KiB
ArmAsm
191 lines
5.1 KiB
ArmAsm
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/*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/serial_reg.h>
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/* OMAP2 serial ports */
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#define OMAP2_UART1_BASE 0x4806a000
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#define OMAP2_UART2_BASE 0x4806c000
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#define OMAP2_UART3_BASE 0x4806e000
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/* OMAP3 serial ports */
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#define OMAP3_UART1_BASE OMAP2_UART1_BASE
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#define OMAP3_UART2_BASE OMAP2_UART2_BASE
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#define OMAP3_UART3_BASE 0x49020000
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#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
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#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
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/* OMAP4 serial ports */
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#define OMAP4_UART1_BASE OMAP2_UART1_BASE
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#define OMAP4_UART2_BASE OMAP2_UART2_BASE
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#define OMAP4_UART3_BASE 0x48020000
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#define OMAP4_UART4_BASE 0x4806e000
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/* TI81XX serial ports */
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#define TI81XX_UART1_BASE 0x48020000
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#define TI81XX_UART2_BASE 0x48022000
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#define TI81XX_UART3_BASE 0x48024000
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/* AM3505/3517 UART4 */
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#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
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/* AM33XX serial port */
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#define AM33XX_UART1_BASE 0x44E09000
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/* OMAP5 serial ports */
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#define OMAP5_UART1_BASE OMAP2_UART1_BASE
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#define OMAP5_UART2_BASE OMAP2_UART2_BASE
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#define OMAP5_UART3_BASE OMAP4_UART3_BASE
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#define OMAP5_UART4_BASE OMAP4_UART4_BASE
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#define OMAP5_UART5_BASE 0x48066000
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#define OMAP5_UART6_BASE 0x48068000
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/* External port on Zoom2/3 */
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#define ZOOM_UART_BASE 0x10000000
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#define ZOOM_UART_VIRT 0xfa400000
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#define OMAP_PORT_SHIFT 2
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#define ZOOM_PORT_SHIFT 1
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#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
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.pushsection .data
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omap_uart_phys: .word 0
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omap_uart_virt: .word 0
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omap_uart_lsr: .word 0
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.popsection
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.macro addruart, rp, rv, tmp
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/* Use omap_uart_phys/virt if already configured */
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10: adr \rp, 99f @ get effective addr of 99f
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ldr \rv, [\rp] @ get absolute addr of 99f
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sub \rv, \rv, \rp @ offset between the two
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ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
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sub \tmp, \rp, \rv @ make it effective
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ldr \rp, [\tmp, #0] @ omap_uart_phys
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ldr \rv, [\tmp, #4] @ omap_uart_virt
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cmp \rp, #0 @ is port configured?
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cmpne \rv, #0
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bne 100f @ already configured
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/* Configure the UART offset from the phys/virt base */
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#ifdef CONFIG_DEBUG_OMAP2UART1
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mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_OMAP2UART2
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mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_OMAP2UART3
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mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_OMAP3UART3
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mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
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add \rp, \rp, #0x00fb0000
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add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_OMAP4UART3
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mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_OMAP3UART4
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mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
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add \rp, \rp, #0x00fb0000
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add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_OMAP4UART4
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mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_TI81XXUART1
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mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_TI81XXUART2
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mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_TI81XXUART3
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mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
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b 98f
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#endif
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#ifdef CONFIG_DEBUG_AM33XXUART1
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ldr \rp, =AM33XX_UART1_BASE
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and \rp, \rp, #0x00ffffff
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b 97f
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#endif
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#ifdef CONFIG_DEBUG_ZOOM_UART
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ldr \rp, =ZOOM_UART_BASE
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str \rp, [\tmp, #0] @ omap_uart_phys
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ldr \rp, =ZOOM_UART_VIRT
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str \rp, [\tmp, #4] @ omap_uart_virt
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mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
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str \rp, [\tmp, #8] @ omap_uart_lsr
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#endif
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b 10b
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/* AM33XX: Store both phys and virt address for the uart */
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97: add \rp, \rp, #0x44000000 @ phys base
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str \rp, [\tmp, #0] @ omap_uart_phys
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sub \rp, \rp, #0x44000000 @ phys base
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add \rp, \rp, #0xf9000000 @ virt base
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str \rp, [\tmp, #4] @ omap_uart_virt
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mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
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str \rp, [\tmp, #8] @ omap_uart_lsr
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b 10b
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/* Store both phys and virt address for the uart */
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98: add \rp, \rp, #0x48000000 @ phys base
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str \rp, [\tmp, #0] @ omap_uart_phys
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sub \rp, \rp, #0x48000000 @ phys base
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add \rp, \rp, #0xfa000000 @ virt base
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str \rp, [\tmp, #4] @ omap_uart_virt
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mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
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str \rp, [\tmp, #8] @ omap_uart_lsr
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b 10b
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.align
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99: .word .
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.word omap_uart_phys
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.ltorg
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100: /* Pass the UART_LSR reg address */
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ldr \tmp, [\tmp, #8] @ omap_uart_lsr
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add \rp, \rp, \tmp
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add \rv, \rv, \tmp
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.endm
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.macro senduart,rd,rx
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orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
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bic \rx, \rx, #0xff @ get base (THR) reg address
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strb \rd, [\rx] @ send lower byte of rd
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orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
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bic \rd, \rd, #(0xff << 24) @ restore original rd
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.endm
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.macro busyuart,rd,rx
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1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
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and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
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teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
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bne 1001b
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.endm
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.macro waituart,rd,rx
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.endm
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