731 lines
19 KiB
Plaintext
731 lines
19 KiB
Plaintext
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/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* As a general rule, only version-specific property overrides should be placed
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* inside this file. Common device definitions should be placed inside the
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* msm8996.dtsi file.
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*/
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#include "msm8996.dtsi"
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#include "msm8996-coresight-v2.dtsi"
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#include "msm-arm-smmu-impl-defs-8996-v2.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. MSM 8996 v2";
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qcom,msm-id = <246 0x20001>;
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};
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&clock_gcc {
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compatible = "qcom,gcc-8996-v2";
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};
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&clock_debug {
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compatible = "qcom,cc-debug-8996-v2";
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};
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&clock_mmss {
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compatible = "qcom,mmsscc-8996-v2";
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};
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&clock_gpu {
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compatible = "qcom,gpucc-8996-v2";
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qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;
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qcom,gfxfreq-speedbin0 =
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< 0 0 0 >,
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< 125000000 3 4 >,
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< 210000000 3 4 >,
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< 300000000 3 4 >,
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< 500000000 4 5 >,
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< 604800000 5 7 >;
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qcom,gfxfreq-mx-speedbin0 =
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< 0 0 >,
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< 125000000 4 >,
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< 210000000 4 >,
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< 300000000 4 >,
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< 500000000 5 >,
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< 604800000 7 >;
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};
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&gdsc_gpu_gx {
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clock-names = "core_clk", "core_root_clk";
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clocks = <&clock_gpu clk_gpu_gx_gfx3d_clk>,
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<&clock_gpu clk_gfx3d_clk_src_v2>;
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};
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&pm8994_s11 {
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regulator-max-microvolt = <1015000>;
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/delete-property/ qcom,recal-mask;
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};
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&pm8994_s11_limit {
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regulator-max-microvolt = <1015000>;
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};
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&apc_apm {
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/delete-property/ qcom,clock-source-override;
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};
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&apcc_cpr {
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compatible = "qcom,cpr3-msm8996-v2-hmss-regulator";
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qcom,cpr-count-mode = <2>; /* Staggered */
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/delete-property/ qcom,cpr-count-repeat;
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/delete-property/ mem-acc-thread0-supply;
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/delete-property/ mem-acc-thread1-supply;
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/delete-property/ mem-acc-supply;
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qcom,apm-ctrl = <&apc_apm>;
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qcom,apm-threshold-voltage = <850000>;
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qcom,apm-hysteresis-voltage = <5000>;
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qcom,cpr-enable;
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qcom,cpr-hw-closed-loop;
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/delete-property/ qcom,cpr-aging-ref-voltage;
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/delete-property/ proxy-supply;
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thread@0 {
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qcom,cpr-consecutive-down = <2>;
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qcom,cpr-up-threshold = <0>;
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};
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thread@1 {
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qcom,cpr-consecutive-down = <2>;
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qcom,cpr-up-threshold = <0>;
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};
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};
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&apc0_pwrcl_vreg {
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <19>;
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qcom,cpr-fuse-corners = <5>;
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qcom,cpr-fuse-combos = <4>;
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/delete-property/ qcom,cpr-speed-bins;
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/delete-property/ qcom,cpr-speed-bin-corners;
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/delete-property/ qcom,uses-mem-acc;
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qcom,cpr-corners = <19>;
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qcom,ldo-max-voltage = <805000>;
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qcom,cpr-corner-fmax-map = <1 2 6 11 19>;
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qcom,cpr-voltage-ceiling =
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<670000 670000 745000 745000 745000 745000 905000 905000
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905000 905000 905000 1015000 1015000 1015000 1015000 1015000
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1015000 1015000 1015000>;
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qcom,cpr-voltage-floor =
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<470000 470000 470000 470000 470000 470000 470000 470000
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470000 470000 470000 470000 470000 470000 470000 470000
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470000 470000 470000>;
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qcom,cpr-floor-to-ceiling-max-range =
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<80000 80000 80000 80000 80000 80000 80000 80000
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80000 80000 80000 80000 80000 80000 80000 80000
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80000 80000 80000>;
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qcom,corner-frequencies =
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<192000000 268800000 307200000 345600000 403200000
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480000000 576000000 633600000 729600000 806400000
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883200000 960000000 1017600000 1113600000 1190400000
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1267200000 1344000000 1420800000 1459200000>;
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qcom,cpr-ro-scaling-factor =
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< 0 0 0 0 2222 2275 2506 2491 2649 2640 2886 2866 0
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0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491 2649 2640 2886 2866 0
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0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491 2649 2640 2886 2866 0
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0 0 0>,
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< 0 0 0 0 2147 2226 2310 2312 2450 2447 2603 2600 0
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0 0 0>,
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< 0 0 0 0 1989 2079 2066 2083 2193 2201 2283 2296 0
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0 0 0>;
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qcom,cpr-open-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>,
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<0 0 0 0 0>,
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<0 0 0 0 0>,
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<0 0 0 0 0>;
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qcom,cpr-closed-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>,
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<0 0 0 0 0>,
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<0 0 0 0 0>,
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<0 0 0 0 0>;
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/delete-property/ qcom,cpr-open-loop-voltage-adjustment;
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/delete-property/ qcom,cpr-open-loop-voltage-min-diff;
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/delete-property/ qcom,cpr-closed-loop-voltage-adjustment;
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/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
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/delete-property/ qcom,cpr-aging-ref-corner;
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/delete-property/ qcom,cpr-aging-ro-scaling-factor;
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/delete-property/ qcom,allow-aging-voltage-adjustment;
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};
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&apc0_cbf_vreg {
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <10>;
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qcom,cpr-fuse-corners = <5>;
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qcom,cpr-fuse-combos = <4>;
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/delete-property/ qcom,cpr-speed-bins;
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/delete-property/ qcom,cpr-speed-bin-corners;
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qcom,cpr-corners = <10>;
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qcom,cpr-corner-fmax-map = <1 2 5 9 10>;
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qcom,cpr-voltage-ceiling =
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<605000 670000 745000 745000 745000 905000 905000 905000
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905000 1015000>;
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qcom,cpr-voltage-floor =
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<470000 470000 470000 470000 470000 470000 470000 470000
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470000 470000>;
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qcom,cpr-floor-to-ceiling-max-range =
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<80000 80000 80000 80000 80000 80000 80000 80000
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80000 80000>;
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qcom,corner-frequencies =
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<150000000 307200000 384000000 499200000 595200000
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691200000 787200000 883200000 960000000 1036800000>;
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qcom,cpr-ro-scaling-factor =
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< 0 0 0 0 2222 2275 2506 2491 2649 2640 2886 2866 0
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0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491 2649 2640 2886 2866 0
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0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491 2649 2640 2886 2866 0
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0 0 0>,
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< 0 0 0 0 2147 2226 2310 2312 2450 2447 2603 2600 0
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0 0 0>,
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< 0 0 0 0 1989 2079 2066 2083 2193 2201 2283 2296 0
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0 0 0>;
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qcom,cpr-open-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>,
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<0 0 0 0 0>,
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<0 0 0 0 (-130000)>,
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<0 0 0 0 (-130000)>;
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qcom,cpr-closed-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>,
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<0 0 0 0 0>,
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<0 0 0 0 (-115000)>,
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<0 0 0 0 (-115000)>;
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/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
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/delete-property/ qcom,cpr-aging-ref-corner;
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/delete-property/ qcom,cpr-aging-ro-scaling-factor;
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/delete-property/ qcom,allow-aging-voltage-adjustment;
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/delete-property/ qcom,proxy-consumer-enable;
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/delete-property/ qcom,proxy-consumer-voltage;
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};
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&apc1_vreg {
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <18>;
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qcom,cpr-fuse-corners = <5>;
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qcom,cpr-fuse-combos = <4>;
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/delete-property/ qcom,cpr-speed-bins;
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/delete-property/ qcom,cpr-speed-bin-corners;
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/delete-property/ qcom,uses-mem-acc;
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qcom,cpr-corners = <18>;
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qcom,ldo-max-voltage = <805000>;
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qcom,cpr-corner-fmax-map = <1 3 5 11 18>;
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qcom,cpr-voltage-ceiling =
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<670000 670000 670000 745000 745000 905000 905000 905000
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905000 905000 905000 1015000 1015000 1015000 1015000 1015000
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1015000 1015000>;
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qcom,cpr-voltage-floor =
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<470000 470000 470000 470000 470000 470000 470000 470000
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470000 470000 470000 470000 470000 470000 470000 470000
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470000 470000>;
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qcom,cpr-floor-to-ceiling-max-range =
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<80000 80000 80000 80000 80000 80000 80000 80000
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80000 80000 80000 80000 80000 80000 80000 80000
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80000 80000>;
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qcom,corner-frequencies =
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<307200000 345600000 403200000 480000000 576000000
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633600000 729600000 806400000 883200000 960000000
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1017600000 1113600000 1190400000 1267200000 1344000000
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1420800000 1497600000 1593600000>;
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qcom,cpr-ro-scaling-factor =
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< 0 0 0 0 2212 2273 2517 2506 2663 2650 2908 2891 0
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0 0 0>,
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< 0 0 0 0 2212 2273 2517 2506 2663 2650 2908 2891 0
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0 0 0>,
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< 0 0 0 0 2212 2273 2517 2506 2663 2650 2908 2891 0
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0 0 0>,
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< 0 0 0 0 2152 2237 2321 2337 2475 2469 2636 2612 0
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0 0 0>,
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< 0 0 0 0 2001 2102 2092 2090 2203 2210 2297 2297 0
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0 0 0>;
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qcom,cpr-open-loop-voltage-fuse-adjustment =
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<0 0 0 5000 0>,
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<0 0 0 5000 0>,
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<0 0 0 0 0>,
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<0 0 0 0 0>;
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qcom,cpr-closed-loop-voltage-fuse-adjustment =
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<0 0 0 20000 0>,
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<0 0 0 20000 0>,
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<0 0 0 0 0>,
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<0 0 0 0 0>;
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/delete-property/ qcom,cpr-open-loop-voltage-adjustment;
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/delete-property/ qcom,cpr-open-loop-voltage-min-diff;
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/delete-property/ qcom,cpr-closed-loop-voltage-adjustment;
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/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
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/delete-property/ qcom,cpr-aging-ref-corner;
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/delete-property/ qcom,cpr-aging-ro-scaling-factor;
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/delete-property/ qcom,allow-aging-voltage-adjustment;
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/delete-property/ qcom,cpr-dynamic-floor-corner;
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};
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&gfx_cpr {
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system-supply = <&pm8994_s1_corner>;
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qcom,cpr-enable;
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/delete-property/ qcom,cpr-aging-ref-voltage;
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};
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&gfx_vreg {
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regulator-min-microvolt = <2>;
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regulator-max-microvolt = <5>;
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qcom,cpr-fuse-corners = <4>;
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qcom,cpr-fuse-combos = <8>;
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qcom,cpr-corners = <5>;
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qcom,cpr-corner-fmax-map = <2 3 4 5>;
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qcom,cpr-voltage-ceiling =
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<400000 670000 745000 905000 1015000>;
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qcom,cpr-voltage-floor =
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<400000 520000 520000 520000 520000>;
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qcom,system-voltage = <2 2 2 2 4>;
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qcom,mem-acc-voltage = <1 1 1 2 2>;
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qcom,corner-frequencies =
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<0 210000000 300000000 500000000 604800000>;
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qcom,cpr-target-quotients =
|
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< 0 0 0 0 249 232 0 394 0 422 0 0 0
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0 0 0>,
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< 0 0 0 0 249 232 0 394 0 422 0 0 0
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0 0 0>,
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< 0 0 0 0 400 363 0 565 0 603 0 0 0
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0 0 0>,
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< 0 0 0 0 669 601 0 851 0 905 0 0 0
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0 0 0>,
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< 0 0 0 0 899 806 0 1084 0 1149 0 0 0
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0 0 0>;
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|
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qcom,cpr-ro-scaling-factor =
|
||
|
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< 0 0 0 0 2268 2004 0 2408 0 2539 0 0 0
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0 0 0>,
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< 0 0 0 0 2268 2004 0 2408 0 2539 0 0 0
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0 0 0>,
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< 0 0 0 0 2268 2004 0 2408 0 2539 0 0 0
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|
|
0 0 0>,
|
||
|
|
< 0 0 0 0 2268 2004 0 2408 0 2539 0 0 0
|
||
|
|
0 0 0>,
|
||
|
|
< 0 0 0 0 2268 2004 0 2408 0 2539 0 0 0
|
||
|
|
0 0 0>;
|
||
|
|
|
||
|
|
qcom,cpr-open-loop-voltage-fuse-adjustment =
|
||
|
|
<0 (-5000) (-30000) (-115000)>;
|
||
|
|
qcom,cpr-closed-loop-voltage-adjustment =
|
||
|
|
<0 0 0 (-10000) (-65000)>;
|
||
|
|
qcom,cpr-floor-to-ceiling-max-range =
|
||
|
|
<0 130000 40000 85000 85000>;
|
||
|
|
|
||
|
|
/delete-property/ qcom,cpr-fused-closed-loop-voltage-adjustment-map;
|
||
|
|
|
||
|
|
/delete-property/ qcom,cpr-aging-max-voltage-adjustment;
|
||
|
|
/delete-property/ qcom,cpr-aging-ref-corner;
|
||
|
|
/delete-property/ qcom,cpr-aging-ro-scaling-factor;
|
||
|
|
/delete-property/ qcom,allow-aging-voltage-adjustment;
|
||
|
|
};
|
||
|
|
|
||
|
|
&kryo0_vreg {
|
||
|
|
regulator-min-microvolt = <468864>;
|
||
|
|
regulator-max-microvolt = <808896>;
|
||
|
|
qcom,vref-functional-step-voltage = <4048>;
|
||
|
|
qcom,vref-functional-min-voltage = <294800>;
|
||
|
|
qcom,vref-retention-step-voltage = <4462>;
|
||
|
|
qcom,vref-retention-min-voltage = <324950>;
|
||
|
|
qcom,ldo-config-init = <0x31f0e471>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&kryo0_retention_vreg {
|
||
|
|
regulator-min-microvolt = <467734>;
|
||
|
|
regulator-max-microvolt = <891624>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&kryo1_vreg {
|
||
|
|
regulator-min-microvolt = <468864>;
|
||
|
|
regulator-max-microvolt = <808896>;
|
||
|
|
qcom,vref-functional-step-voltage = <4048>;
|
||
|
|
qcom,vref-functional-min-voltage = <294800>;
|
||
|
|
qcom,vref-retention-step-voltage = <4462>;
|
||
|
|
qcom,vref-retention-min-voltage = <324950>;
|
||
|
|
qcom,ldo-config-init = <0x31f0e471>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&kryo1_retention_vreg {
|
||
|
|
regulator-min-microvolt = <467734>;
|
||
|
|
regulator-max-microvolt = <891624>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&apc0_pwrcl_mem_acc_vreg {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&apc1_perfcl_mem_acc_vreg {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&apcc_l3_mem_acc_vreg {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* GPU overrides */
|
||
|
|
&msm_gpu {
|
||
|
|
/* Updated chip ID */
|
||
|
|
qcom,chipid = <0x05030001>;
|
||
|
|
|
||
|
|
qcom,initial-pwrlevel = <3>;
|
||
|
|
qcom,bus-width = <32>;
|
||
|
|
|
||
|
|
/* Quirks */
|
||
|
|
qcom,gpu-quirk-two-pass-use-wfi;
|
||
|
|
qcom,gpu-quirk-iommu-sync;
|
||
|
|
|
||
|
|
/* Power levels */
|
||
|
|
qcom,gpu-pwrlevels {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
compatible = "qcom,gpu-pwrlevels";
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevel@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,gpu-freq = <604800000>;
|
||
|
|
qcom,bus-freq = <11>;
|
||
|
|
qcom,bus-min = <10>;
|
||
|
|
qcom,bus-max = <11>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevel@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,gpu-freq = <500000000>;
|
||
|
|
qcom,bus-freq = <9>;
|
||
|
|
qcom,bus-min = <8>;
|
||
|
|
qcom,bus-max = <10>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevel@2 {
|
||
|
|
reg = <2>;
|
||
|
|
qcom,gpu-freq = <300000000>;
|
||
|
|
qcom,bus-freq = <6>;
|
||
|
|
qcom,bus-min = <5>;
|
||
|
|
qcom,bus-max = <7>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevel@3 {
|
||
|
|
reg = <3>;
|
||
|
|
qcom,gpu-freq = <210000000>;
|
||
|
|
qcom,bus-freq = <4>;
|
||
|
|
qcom,bus-min = <3>;
|
||
|
|
qcom,bus-max = <5>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,gpu-pwrlevel@4 {
|
||
|
|
reg = <4>;
|
||
|
|
qcom,gpu-freq = <125000000>;
|
||
|
|
qcom,bus-freq = <2>;
|
||
|
|
qcom,bus-min = <1>;
|
||
|
|
qcom,bus-max = <3>;
|
||
|
|
};
|
||
|
|
qcom,gpu-pwrlevel@5 {
|
||
|
|
reg = <5>;
|
||
|
|
qcom,gpu-freq = <27000000>;
|
||
|
|
qcom,bus-freq = <0>;
|
||
|
|
qcom,bus-min = <0>;
|
||
|
|
qcom,bus-max = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_mdp {
|
||
|
|
gdsc-venus-supply = <&gdsc_venus>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_dsi {
|
||
|
|
gdsc-venus-supply = <&gdsc_venus>;
|
||
|
|
qcom,core-supply-entries {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,core-supply-entry@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,supply-name = "gdsc-venus";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,core-supply-entry@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,supply-name = "gdsc";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_hdmi_tx {
|
||
|
|
hpd-gdsc-venus-supply = <&gdsc_venus>;
|
||
|
|
qcom,supply-names = "hpd-gdsc-venus", "hpd-gdsc";
|
||
|
|
qcom,min-voltage-level = <0 0>;
|
||
|
|
qcom,max-voltage-level = <0 0>;
|
||
|
|
qcom,enable-load = <0 0>;
|
||
|
|
qcom,disable-load = <0 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_dsi0_pll {
|
||
|
|
gdsc-venus-supply = <&gdsc_venus>;
|
||
|
|
qcom,platform-supply-entries {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,supply-name = "gdsc-venus";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,supply-name = "gdsc";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_dsi1_pll {
|
||
|
|
gdsc-venus-supply = <&gdsc_venus>;
|
||
|
|
qcom,platform-supply-entries {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,supply-name = "gdsc-venus";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,supply-name = "gdsc";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_hdmi_pll {
|
||
|
|
gdsc-venus-supply = <&gdsc_venus>;
|
||
|
|
qcom,platform-supply-entries {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@0 {
|
||
|
|
reg = <0>;
|
||
|
|
qcom,supply-name = "gdsc-venus";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@1 {
|
||
|
|
reg = <1>;
|
||
|
|
qcom,supply-name = "gdsc";
|
||
|
|
qcom,supply-min-voltage = <0>;
|
||
|
|
qcom,supply-max-voltage = <0>;
|
||
|
|
qcom,supply-enable-load = <0>;
|
||
|
|
qcom,supply-disable-load = <0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@2 {
|
||
|
|
reg = <2>;
|
||
|
|
qcom,supply-name = "vddio";
|
||
|
|
qcom,supply-min-voltage = <1800000>;
|
||
|
|
qcom,supply-max-voltage = <1800000>;
|
||
|
|
qcom,supply-enable-load = <100000>;
|
||
|
|
qcom,supply-disable-load = <100>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,platform-supply-entry@3 {
|
||
|
|
reg = <3>;
|
||
|
|
qcom,supply-name = "vcca";
|
||
|
|
qcom,supply-min-voltage = <925000>;
|
||
|
|
qcom,supply-max-voltage = <925000>;
|
||
|
|
qcom,supply-enable-load = <10000>;
|
||
|
|
qcom,supply-disable-load = <100>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&gdsc_venus {
|
||
|
|
proxy-supply = <&gdsc_venus>;
|
||
|
|
qcom,proxy-consumer-enable;
|
||
|
|
};
|
||
|
|
|
||
|
|
&soc {
|
||
|
|
tsens1: tsens@4ad000 {
|
||
|
|
compatible = "qcom,msm8996-tsens";
|
||
|
|
reg = <0x4ac000 0x2000>,
|
||
|
|
<0x75230 0x1000>;
|
||
|
|
reg-names = "tsens_physical", "tsens_eeprom_physical";
|
||
|
|
interrupts = <0 184 0>, <0 430 0>;
|
||
|
|
interrupt-names = "tsens-upper-lower", "tsens-critical";
|
||
|
|
qcom,client-id = <13 14 15 16 17 18 19 20>;
|
||
|
|
qcom,sensor-id = <1 6 7 0 2 3 4 5>;
|
||
|
|
qcom,sensors = <8>;
|
||
|
|
qcom,slope = <2901 2846 3200 3200 3200 3200 3200 3200>;
|
||
|
|
};
|
||
|
|
|
||
|
|
ipa_hw: qcom,ipa@680000 {
|
||
|
|
compatible = "qcom,ipa";
|
||
|
|
reg = <0x680000 0x4effc>,
|
||
|
|
<0x684000 0x26934>;
|
||
|
|
reg-names = "ipa-base", "bam-base";
|
||
|
|
interrupts = <0 333 0>,
|
||
|
|
<0 432 0>;
|
||
|
|
interrupt-names = "ipa-irq", "bam-irq";
|
||
|
|
qcom,ipa-hw-ver = <5>; /* IPA core version = IPAv2.5 */
|
||
|
|
qcom,ipa-hw-mode = <0>;
|
||
|
|
qcom,ee = <0>;
|
||
|
|
qcom,use-ipa-tethering-bridge;
|
||
|
|
qcom,ipa-bam-remote-mode;
|
||
|
|
qcom,modem-cfg-emb-pipe-flt;
|
||
|
|
clocks = <&clock_gcc clk_ipa_clk>;
|
||
|
|
clock-names = "core_clk";
|
||
|
|
qcom,use-dma-zone;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,msm-thermal{
|
||
|
|
qcom,vdd-gfx-rstr{
|
||
|
|
qcom,levels = <4 5 5>; /* Nominal, Turbo, Turbo */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
jtag_mm0: jtagmm@3840000 {
|
||
|
|
compatible = "qcom,jtagv8-mm";
|
||
|
|
reg = <0x3840000 0x1000>;
|
||
|
|
reg-names = "etm-base";
|
||
|
|
|
||
|
|
clocks = <&clock_gcc clk_qdss_clk>,
|
||
|
|
<&clock_gcc clk_qdss_a_clk>;
|
||
|
|
clock-names = "core_clk", "core_a_clk";
|
||
|
|
|
||
|
|
qcom,coresight-jtagmm-cpu = <&CPU0>;
|
||
|
|
qcom,si-enable;
|
||
|
|
qcom,save-restore-disable;
|
||
|
|
};
|
||
|
|
|
||
|
|
jtag_mm1: jtagmm@3940000 {
|
||
|
|
compatible = "qcom,jtagv8-mm";
|
||
|
|
reg = <0x3940000 0x1000>;
|
||
|
|
reg-names = "etm-base";
|
||
|
|
|
||
|
|
clocks = <&clock_gcc clk_qdss_clk>,
|
||
|
|
<&clock_gcc clk_qdss_a_clk>;
|
||
|
|
clock-names = "core_clk", "core_a_clk";
|
||
|
|
|
||
|
|
qcom,coresight-jtagmm-cpu = <&CPU1>;
|
||
|
|
qcom,si-enable;
|
||
|
|
qcom,save-restore-disable;
|
||
|
|
};
|
||
|
|
|
||
|
|
jtag_mm2: jtagmm@3a40000 {
|
||
|
|
compatible = "qcom,jtagv8-mm";
|
||
|
|
reg = <0x3a40000 0x1000>;
|
||
|
|
reg-names = "etm-base";
|
||
|
|
|
||
|
|
clocks = <&clock_gcc clk_qdss_clk>,
|
||
|
|
<&clock_gcc clk_qdss_a_clk>;
|
||
|
|
clock-names = "core_clk", "core_a_clk";
|
||
|
|
|
||
|
|
qcom,coresight-jtagmm-cpu = <&CPU2>;
|
||
|
|
qcom,si-enable;
|
||
|
|
qcom,save-restore-disable;
|
||
|
|
};
|
||
|
|
|
||
|
|
jtag_mm3: jtagmm@3b40000 {
|
||
|
|
compatible = "qcom,jtagv8-mm";
|
||
|
|
reg = <0x3b40000 0x1000>;
|
||
|
|
reg-names = "etm-base";
|
||
|
|
|
||
|
|
clocks = <&clock_gcc clk_qdss_clk>,
|
||
|
|
<&clock_gcc clk_qdss_a_clk>;
|
||
|
|
clock-names = "core_clk", "core_a_clk";
|
||
|
|
|
||
|
|
qcom,coresight-jtagmm-cpu = <&CPU3>;
|
||
|
|
qcom,si-enable;
|
||
|
|
qcom,save-restore-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&tsens0 {
|
||
|
|
interrupts = <0 458 0>, <0 445 0>;
|
||
|
|
qcom,sensors = <13>;
|
||
|
|
qcom,slope = <2901 2846 3200 3200 3200 3200 3200 3200 3200 3200 3200 3200 3200>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_hdmi_pll {
|
||
|
|
compatible = "qcom,mdss_hdmi_pll_8996_v2";
|
||
|
|
};
|
||
|
|
|
||
|
|
&mdss_hdmi_tx {
|
||
|
|
status = "ok";
|
||
|
|
};
|
||
|
|
|
||
|
|
&ssphy {
|
||
|
|
qcom,qmp-misc-config;
|
||
|
|
};
|