179 lines
6.9 KiB
Plaintext
179 lines
6.9 KiB
Plaintext
|
Device tree bindings for MVEBU Device Bus controllers
|
||
|
|
|
||
|
|
The Device Bus controller available in some Marvell's SoC allows to control
|
||
|
|
different types of standard memory and I/O devices such as NOR, NAND, and FPGA.
|
||
|
|
The actual devices are instantiated from the child nodes of a Device Bus node.
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
|
||
|
|
- compatible: Armada 370/XP SoC are supported using the
|
||
|
|
"marvell,mvebu-devbus" compatible string.
|
||
|
|
|
||
|
|
Orion5x SoC are supported using the
|
||
|
|
"marvell,orion-devbus" compatible string.
|
||
|
|
|
||
|
|
- reg: A resource specifier for the register space.
|
||
|
|
This is the base address of a chip select within
|
||
|
|
the controller's register space.
|
||
|
|
(see the example below)
|
||
|
|
|
||
|
|
- #address-cells: Must be set to 1
|
||
|
|
- #size-cells: Must be set to 1
|
||
|
|
- ranges: Must be set up to reflect the memory layout with four
|
||
|
|
integer values for each chip-select line in use:
|
||
|
|
0 <physical address of mapping> <size>
|
||
|
|
|
||
|
|
Optional properties:
|
||
|
|
|
||
|
|
- devbus,keep-config This property can optionally be used to keep
|
||
|
|
using the timing parameters set by the
|
||
|
|
bootloader. It makes all the timing properties
|
||
|
|
described below unused.
|
||
|
|
|
||
|
|
Timing properties for child nodes:
|
||
|
|
|
||
|
|
Read parameters:
|
||
|
|
|
||
|
|
- devbus,turn-off-ps: Defines the time during which the controller does not
|
||
|
|
drive the AD bus after the completion of a device read.
|
||
|
|
This prevents contentions on the Device Bus after a read
|
||
|
|
cycle from a slow device.
|
||
|
|
Mandatory, except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
- devbus,bus-width: Defines the bus width, in bits (e.g. <16>).
|
||
|
|
Mandatory, except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
- devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
|
||
|
|
to read data sample. This parameter is useful for
|
||
|
|
synchronous pipelined devices, where the address
|
||
|
|
precedes the read data by one or two cycles.
|
||
|
|
Mandatory, except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
- devbus,acc-first-ps: Defines the time delay from the negation of
|
||
|
|
ALE[0] to the cycle that the first read data is sampled
|
||
|
|
by the controller.
|
||
|
|
Mandatory, except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
- devbus,acc-next-ps: Defines the time delay between the cycle that
|
||
|
|
samples data N and the cycle that samples data N+1
|
||
|
|
(in burst accesses).
|
||
|
|
Mandatory, except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
- devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
|
||
|
|
DEV_OEn assertion. If set to 0 (default),
|
||
|
|
DEV_OEn and DEV_CSn are asserted at the same cycle.
|
||
|
|
This parameter has no affect on <acc-first-ps> parameter
|
||
|
|
(no affect on first data sample). Set <rd-setup-ps>
|
||
|
|
to a value smaller than <acc-first-ps>.
|
||
|
|
Mandatory for "marvell,mvebu-devbus" compatible string,
|
||
|
|
except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
- devbus,rd-hold-ps: Defines the time between the last data sample to the
|
||
|
|
de-assertion of DEV_CSn. If set to 0 (default),
|
||
|
|
DEV_OEn and DEV_CSn are de-asserted at the same cycle
|
||
|
|
(the cycle of the last data sample).
|
||
|
|
This parameter has no affect on DEV_OEn de-assertion.
|
||
|
|
DEV_OEn is always de-asserted the next cycle after
|
||
|
|
last data sampled. Also this parameter has no
|
||
|
|
affect on <turn-off-ps> parameter.
|
||
|
|
Set <rd-hold-ps> to a value smaller than <turn-off-ps>.
|
||
|
|
Mandatory for "marvell,mvebu-devbus" compatible string,
|
||
|
|
except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
Write parameters:
|
||
|
|
|
||
|
|
- devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
|
||
|
|
to the DEV_WEn assertion.
|
||
|
|
Mandatory.
|
||
|
|
|
||
|
|
- devbus,wr-low-ps: Defines the time during which DEV_WEn is active.
|
||
|
|
A[2:0] and Data are kept valid as long as DEV_WEn
|
||
|
|
is active. This parameter defines the setup time of
|
||
|
|
address and data to DEV_WEn rise.
|
||
|
|
Mandatory.
|
||
|
|
|
||
|
|
- devbus,wr-high-ps: Defines the time during which DEV_WEn is kept
|
||
|
|
inactive (high) between data beats of a burst write.
|
||
|
|
DEV_A[2:0] and Data are kept valid (do not toggle) for
|
||
|
|
<wr-high-ps> - <tick> ps.
|
||
|
|
This parameter defines the hold time of address and
|
||
|
|
data after DEV_WEn rise.
|
||
|
|
Mandatory.
|
||
|
|
|
||
|
|
- devbus,sync-enable: Synchronous device enable.
|
||
|
|
1: True
|
||
|
|
0: False
|
||
|
|
Mandatory for "marvell,mvebu-devbus" compatible string,
|
||
|
|
except if devbus,keep-config is used.
|
||
|
|
|
||
|
|
An example for an Armada XP GP board, with a 16 MiB NOR device as child
|
||
|
|
is showed below. Note that the Device Bus driver is in charge of allocating
|
||
|
|
the mbus address decoding window for each of its child devices.
|
||
|
|
The window is created using the chip select specified in the child
|
||
|
|
device node together with the base address and size specified in the ranges
|
||
|
|
property. For instance, in the example below the allocated decoding window
|
||
|
|
will start at base address 0xf0000000, with a size 0x1000000 (16 MiB)
|
||
|
|
for chip select 0 (a.k.a DEV_BOOTCS).
|
||
|
|
|
||
|
|
This address window handling is done in this mvebu-devbus only as a temporary
|
||
|
|
solution. It will be removed when the support for mbus device tree binding is
|
||
|
|
added.
|
||
|
|
|
||
|
|
The reg property implicitly specifies the chip select as this:
|
||
|
|
|
||
|
|
0x10400: DEV_BOOTCS
|
||
|
|
0x10408: DEV_CS0
|
||
|
|
0x10410: DEV_CS1
|
||
|
|
0x10418: DEV_CS2
|
||
|
|
0x10420: DEV_CS3
|
||
|
|
|
||
|
|
Example:
|
||
|
|
|
||
|
|
devbus-bootcs@d0010400 {
|
||
|
|
status = "okay";
|
||
|
|
ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf0000000, size 0x1000000 */
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
/* Device Bus parameters are required */
|
||
|
|
|
||
|
|
/* Read parameters */
|
||
|
|
devbus,bus-width = <8>;
|
||
|
|
devbus,turn-off-ps = <60000>;
|
||
|
|
devbus,badr-skew-ps = <0>;
|
||
|
|
devbus,acc-first-ps = <124000>;
|
||
|
|
devbus,acc-next-ps = <248000>;
|
||
|
|
devbus,rd-setup-ps = <0>;
|
||
|
|
devbus,rd-hold-ps = <0>;
|
||
|
|
|
||
|
|
/* Write parameters */
|
||
|
|
devbus,sync-enable = <0>;
|
||
|
|
devbus,wr-high-ps = <60000>;
|
||
|
|
devbus,wr-low-ps = <60000>;
|
||
|
|
devbus,ale-wr-ps = <60000>;
|
||
|
|
|
||
|
|
flash@0 {
|
||
|
|
compatible = "cfi-flash";
|
||
|
|
|
||
|
|
/* 16 MiB */
|
||
|
|
reg = <0 0x1000000>;
|
||
|
|
bank-width = <2>;
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* We split the 16 MiB in two partitions,
|
||
|
|
* just as an example.
|
||
|
|
*/
|
||
|
|
partition@0 {
|
||
|
|
label = "First";
|
||
|
|
reg = <0 0x800000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
partition@800000 {
|
||
|
|
label = "Second";
|
||
|
|
reg = <0x800000 0x800000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|