33 lines
1.4 KiB
Plaintext
33 lines
1.4 KiB
Plaintext
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* Inline Crypto Engine (ICE)
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Required properties:
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- compatible : should be "qcom,ice"
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- reg : <register mapping>
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Optional properties:
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- interrupt-names : name describing the interrupts for ICE IRQ
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- interrupts : <interrupt mapping for ICE IRQ>
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- qcom,enable-ice-clk : should enable clocks for ICE HW
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- clocks : List of phandle and clock specifier pairs
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- clock-names : List of clock input name strings sorted in the same
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order as the clocks property.
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- qocm,op-freq-hz : max clock speed sorted in the same order as the clocks
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property.
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- qcom,instance-type : describe the storage type for which ICE node is defined
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currently, only "ufs" and "sdcc" are supported storage type
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Example:
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ufs_ice: ufsice@630000 {
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compatible = "qcom,ice";
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reg = <0x630000 0x8000>;
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interrupt-names = "ufs_ice_nonsec_level_irq", "ufs_ice_sec_level_irq";
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interrupts = <0 258 0>, <0 257 0>;
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qcom,enable-ice-clk;
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clock-names = "ice_core_clk_src", "ice_core_clk";
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clocks = <&clock_gcc clk_ufs_ice_core_clk_src>,
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<&clock_gcc clk_gcc_ufs_ice_core_clk>;
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qcom,op-freq-hz = <300000000>, <0>;
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qcom,instance-type = "ufs";
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status = "disabled";
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};
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