213 lines
5.8 KiB
C
213 lines
5.8 KiB
C
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/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdlib.h>
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#include <arch/ops.h>
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#include <sys/types.h>
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#include <reg.h>
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#include <platform/interrupts.h>
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#include <platform/iomap.h>
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#include <platform/irqs.h>
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#include <ufs_hw.h>
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#include <utp.h>
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#include <ufs.h>
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uint64_t ufs_alloc_trans_req_list()
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{
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void *ptr;
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ptr = memalign(lcm(CACHE_LINE, 1024), 32 * sizeof(struct utp_trans_req_desc));
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if (!ptr)
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{
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dprintf(CRITICAL, "Failed to allocate utrd list.\n");
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}
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return (addr_t) ptr;
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}
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uint64_t ufs_alloc_task_mgmt_req_list()
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{
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addr_t ptr = (addr_t) memalign(1024, 1024);
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if (!ptr)
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{
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dprintf(CRITICAL, "Failed to allocate memory for Task mamagement request list.\n");
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}
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return ptr;
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}
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int ufs_enable_hci(struct ufs_dev *dev)
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{
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int ret;
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/* Enable host controller */
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writel(UFS_HCE_ENABLE, UFS_HCE(dev->base));
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/* Wait until host controller is enabled. */
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ret = ufs_reg_target_val_timeout_loop(UFS_HCE(dev->base), 1, UFS_HCE_TIMEOUT);
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if (ret)
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{
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dprintf(CRITICAL, "Failed to enable UFS host controller.\n");
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}
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return ret;
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}
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void ufs_irq_enable(struct ufs_dev *dev, uint32_t irq)
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{
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/* Clear all irqs. */
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writel(0xFFFFFFFF, UFS_IS(dev->base));
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writel(irq, UFS_IE(dev->base));
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register_int_handler(UFS_IRQ, ufs_irq_handler, dev);
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unmask_interrupt(UFS_IRQ);
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}
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enum handler_return ufs_irq_handler(void* data)
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{
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uint32_t val, val_uecpa, val_uecdl, base;
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struct ufs_dev *dev = (struct ufs_dev *) data;
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struct ufs_req_irq_type irq;
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base = dev->base;
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val = readl(UFS_IS(base));
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if (val & UFS_IS_SBFES)
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{
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/* Controller might be in a bad state, unrecoverable error. */
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dprintf(CRITICAL, "UFS error: System Bus Fatal Error\n");
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ASSERT(0);
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}
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else if (val & UFS_IS_UTPES)
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{
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/* Unrecoverable error occured at the utp layer */
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dprintf(CRITICAL, "UFS error: UTP Error\n");
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ASSERT(0);
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}
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else if ((val & UFS_IS_HCFES) || (val & UFS_IS_DFES))
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{
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/* Controller might be in a bad state, unrecoverable error. */
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/* HCFES: Host Controller Fatal Error Status */
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/* DFES: Device Fatal Error Status */
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dprintf(CRITICAL, "UFS error: HCFES:0x%x DFES:0x%x\n",
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val & UFS_IS_HCFES, val & UFS_IS_DFES);
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ASSERT(0);
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}
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else if (val & UFS_IS_UE)
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{
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/* Error in one of the layers in the UniPro stack */
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dprintf(CRITICAL, "UFS error: UE.\n");
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/* Check if the error is because of UECPA or UECDL */
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val_uecpa = readl(UFS_UECPA(base));
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val_uecdl = readl(UFS_UECDL(base));
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if((val_uecpa & UFS_IS_UECPA) || (val_uecdl & UFS_IS_UECDL))
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{
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dprintf(CRITICAL, "UIC non-fatal error. IS: 0x%x UECPA: 0x%x UECDL: 0x%x\n",
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val, val_uecpa, val_uecdl);
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irq.irq_handled = BIT(2);
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val &= ~UFS_IS_UE;
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writel(irq.irq_handled, UFS_IS(dev->base));
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dprintf(CRITICAL, "UIC non-fatal error handled. Pending interrupt mask: 0x%x\n", val);
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}
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else
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{
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dprintf(CRITICAL, "UIC fatal error.\n");
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ufs_dump_hc_registers(dev);
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ASSERT(0);
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}
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}
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while (val)
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{
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irq.irq_handled = 0;
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if (val & UFS_IS_UCCS)
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{
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/* UIC command */
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event_signal(&(dev->uic_data.uic_event), false);
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/* Clear irq. */
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writel(UFS_IS_UCCS, UFS_IS(dev->base));
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val &= ~UFS_IS_UCCS;
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irq.irq_handled = UFS_IS_UCCS;
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continue;
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}
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else if (val & UFS_IS_UTRCS)
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{
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/* UTRD completion. */
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irq.list = &(dev->utrd_data.list_head.list_node);
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irq.irq_handled = UFS_IS_UTRCS;
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irq.door_bell_reg = UFS_UTRLDBR(dev->base);
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/* Clear irq. */
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writel(irq.irq_handled, UFS_IS(dev->base));
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val &= ~irq.irq_handled;
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utp_process_req_completion(&irq);
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}
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else if (val & UFS_IS_UTMRCS)
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{
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/* UTMRD completion. */
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irq.list = &(dev->utmrd_data.list_head.list_node);
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irq.irq_handled = UFS_IS_UTMRCS;
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/* TODO: Fill in door bell reg for management requests. */
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/* Clear irq. */
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writel(irq.irq_handled, UFS_IS(dev->base));
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val &= ~irq.irq_handled;
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utp_process_req_completion(&irq);
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}
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else
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{
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dprintf(CRITICAL, "Unknown irq.\n");
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ASSERT(0);
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}
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}
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return INT_NO_RESCHEDULE;
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}
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int ufs_reg_target_val_timeout_loop(uint32_t reg_addr, uint32_t target_val, uint32_t timeout)
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{
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uint32_t try_again;
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uint32_t val;
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try_again = timeout;
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do
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{
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try_again--;
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val = readl(reg_addr);
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} while (!(val & target_val) && try_again);
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if (!(val & target_val))
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return -UFS_FAILURE;
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else
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return UFS_SUCCESS;
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}
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