86 lines
2.6 KiB
C
86 lines
2.6 KiB
C
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/*
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* Copyright (C) ST-Ericsson AP Pte Ltd 2010
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*
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* ISP1763 Linux OTG Controller driver : hal
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*
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* This program is free software; you can redistribute it and/or modify it under the terms of
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* the GNU General Public License as published by the Free Software Foundation; version
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* 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT ANY
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* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* This is a hardware abstraction layer header file.
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*
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* Author : wired support <wired.support@stericsson.com>
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*
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*/
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#ifndef HAL_X86_H
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#define HAL_X86_H
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#define DRIVER_AUTHOR "ST-ERICSSON "
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#define DRIVER_DESC "ISP1763 bus driver"
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/* Driver tuning, per ST-ERICSSON requirements: */
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#define MEM_TO_CHECK 4096 /*bytes, must be multiple of 2 */
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/* BIT defines */
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#define BIT0 (1 << 0)
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#define BIT1 (1 << 1)
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#define BIT2 (1 << 2)
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#define BIT3 (1 << 3)
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#define BIT4 (1 << 4)
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#define BIT5 (1 << 5)
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#define BIT6 (1 << 6)
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#define BIT7 (1 << 7)
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#define BIT8 (1 << 8)
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#define BIT9 (1 << 9)
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#define BIT10 (1 << 10)
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#define BIT11 (1 << 11)
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#define BIT12 (1 << 12)
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#define BIT13 (1 << 13)
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#define BIT14 (1 << 14)
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#define BIT15 (1 << 15)
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#define BIT16 (1 << 16)
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#define BIT17 (1 << 17)
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#define BIT18 (1 << 18)
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#define BIT19 (1 << 19)
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#define BIT20 (1 << 20)
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#define BIT21 (1 << 21)
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#define BIT22 (1 << 22)
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#define BIT23 (1 << 23)
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#define BIT24 (1 << 24)
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#define BIT25 (1 << 26)
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#define BIT27 (1 << 27)
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#define BIT28 (1 << 28)
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#define BIT29 (1 << 29)
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#define BIT30 (1 << 30)
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#define BIT31 (1 << 31)
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/* Definitions Related to Chip Address and CPU Physical Address
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* cpu_phy_add: CPU Physical Address , it uses 32 bit data per address
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* chip_add : Chip Address, it uses double word(64) bit data per address
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*/
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#define chip_add(cpu_phy_add) (((cpu_phy_add) - 0x400) / 8)
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#define cpu_phy_add(chip_add) ((8 * (chip_add)) + 0x400)
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/* for getting end add, and start add, provided we have one address with us */
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/* IMPORTANT length hex(base16) and dec(base10) works fine*/
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#define end_add(start_add, length) (start_add + (length - 4))
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#define start_add(end_add, length) (end_add - (length - 4))
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/* Device Registers*/
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#define DEV_UNLOCK_REGISTER 0x7C
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#define DEV_INTERRUPT_REGISTER 0x18
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#define INT_ENABLE_REGISTER 0x14
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#endif /*_HAL_X86_H_ */
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