609 lines
16 KiB
C
609 lines
16 KiB
C
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/ratelimit.h>
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#include <mach/msm_smem.h>
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#include "ipa_i.h"
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/*
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* EP0 (teth)
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* A2_BAM(1)->(12)DMA_BAM->DMA_BAM(13)->(6)IPA_BAM->IPA_BAM(10)->USB_BAM(0)
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* A2_BAM(0)<-(15)DMA_BAM<-DMA_BAM(14)<-(7)IPA_BAM<-IPA_BAM(11)<-USB_BAM(1)
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*
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* EP2 (emb)
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* A2_BAM(5)->(16)DMA_BAM->DMA_BAM(17)->(8)IPA_BAM->
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* A2_BAM(4)<-(19)DMA_BAM<-DMA_BAM(18)<-(9)IPA_BAM<-
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*/
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#define A2_TETHERED_PIPE_UL 0
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#define DMA_A2_TETHERED_PIPE_UL 15
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#define DMA_IPA_TETHERED_PIPE_UL 14
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#define A2_TETHERED_PIPE_DL 1
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#define DMA_A2_TETHERED_PIPE_DL 12
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#define DMA_IPA_TETHERED_PIPE_DL 13
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#define A2_EMBEDDED_PIPE_UL 4
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#define DMA_A2_EMBEDDED_PIPE_UL 19
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#define DMA_IPA_EMBEDDED_PIPE_UL 18
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#define A2_EMBEDDED_PIPE_DL 5
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#define DMA_A2_EMBEDDED_PIPE_DL 16
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#define DMA_IPA_EMBEDDED_PIPE_DL 17
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#define IPA_SMEM_PIPE_MEM_SZ 32768
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#define IPA_UL_DATA_FIFO_SZ 0xc00
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#define IPA_UL_DESC_FIFO_SZ 0x530
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#define IPA_DL_DATA_FIFO_SZ 0x2400
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#define IPA_DL_DESC_FIFO_SZ 0x8a0
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#define IPA_DL_EMB_DATA_FIFO_SZ 0x1800
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#define IPA_DL_EMB_DESC_FIFO_SZ 0x4e8
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#define IPA_SMEM_UL_DATA_FIFO_OFST 0
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#define IPA_SMEM_UL_DESC_FIFO_OFST 0xc00
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#define IPA_SMEM_DL_DATA_FIFO_OFST 0x1130
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#define IPA_SMEM_DL_DESC_FIFO_OFST 0x3530
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#define IPA_SMEM_UL_EMB_DATA_FIFO_OFST 0x3dd0
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#define IPA_SMEM_UL_EMB_DESC_FIFO_OFST 0x49d0
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#define IPA_OCIMEM_DL_A2_DATA_FIFO_OFST 0
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#define IPA_OCIMEM_DL_A2_DESC_FIFO_OFST (IPA_OCIMEM_DL_A2_DATA_FIFO_OFST + \
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IPA_DL_EMB_DATA_FIFO_SZ)
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#define IPA_OCIMEM_DL_IPA_DATA_FIFO_OFST (IPA_OCIMEM_DL_A2_DESC_FIFO_OFST + \
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IPA_DL_EMB_DESC_FIFO_SZ)
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#define IPA_OCIMEM_DL_IPA_DESC_FIFO_OFST (IPA_OCIMEM_DL_IPA_DATA_FIFO_OFST + \
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IPA_DL_EMB_DATA_FIFO_SZ)
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enum ipa_pipe_type {
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IPA_DL_FROM_A2,
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IPA_DL_TO_IPA,
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IPA_UL_FROM_IPA,
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IPA_UL_TO_A2,
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IPA_PIPE_TYPE_MAX
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};
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struct ipa_bridge_pipe_context {
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struct sps_pipe *pipe;
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bool ipa_facing;
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bool valid;
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};
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struct ipa_bridge_context {
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struct ipa_bridge_pipe_context pipe[IPA_PIPE_TYPE_MAX];
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enum ipa_bridge_type type;
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};
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static struct ipa_bridge_context bridge[IPA_BRIDGE_TYPE_MAX];
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static void ipa_get_dma_pipe_num(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type, int *a2, int *ipa)
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{
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if (type == IPA_BRIDGE_TYPE_TETHERED) {
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if (dir == IPA_BRIDGE_DIR_UL) {
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*a2 = DMA_A2_TETHERED_PIPE_UL;
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*ipa = DMA_IPA_TETHERED_PIPE_UL;
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} else {
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*a2 = DMA_A2_TETHERED_PIPE_DL;
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*ipa = DMA_IPA_TETHERED_PIPE_DL;
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}
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} else {
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if (dir == IPA_BRIDGE_DIR_UL) {
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*a2 = DMA_A2_EMBEDDED_PIPE_UL;
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*ipa = DMA_IPA_EMBEDDED_PIPE_UL;
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} else {
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*a2 = DMA_A2_EMBEDDED_PIPE_DL;
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*ipa = DMA_IPA_EMBEDDED_PIPE_DL;
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}
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}
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}
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static int ipa_get_desc_fifo_sz(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type)
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{
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int sz;
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if (type == IPA_BRIDGE_TYPE_TETHERED) {
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if (dir == IPA_BRIDGE_DIR_UL)
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sz = IPA_UL_DESC_FIFO_SZ;
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else
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sz = IPA_DL_DESC_FIFO_SZ;
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} else {
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if (dir == IPA_BRIDGE_DIR_UL)
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sz = IPA_UL_DESC_FIFO_SZ;
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else
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sz = IPA_DL_EMB_DESC_FIFO_SZ;
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}
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return sz;
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}
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static int ipa_get_data_fifo_sz(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type)
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{
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int sz;
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if (type == IPA_BRIDGE_TYPE_TETHERED) {
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if (dir == IPA_BRIDGE_DIR_UL)
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sz = IPA_UL_DATA_FIFO_SZ;
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else
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sz = IPA_DL_DATA_FIFO_SZ;
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} else {
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if (dir == IPA_BRIDGE_DIR_UL)
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sz = IPA_UL_DATA_FIFO_SZ;
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else
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sz = IPA_DL_EMB_DATA_FIFO_SZ;
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}
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return sz;
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}
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static int ipa_get_a2_pipe_num(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type)
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{
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int ep;
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if (type == IPA_BRIDGE_TYPE_TETHERED) {
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if (dir == IPA_BRIDGE_DIR_UL)
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ep = A2_TETHERED_PIPE_UL;
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else
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ep = A2_TETHERED_PIPE_DL;
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} else {
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if (dir == IPA_BRIDGE_DIR_UL)
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ep = A2_EMBEDDED_PIPE_UL;
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else
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ep = A2_EMBEDDED_PIPE_DL;
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}
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return ep;
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}
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int ipa_setup_ipa_dma_fifos(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type,
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struct sps_mem_buffer *desc,
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struct sps_mem_buffer *data)
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{
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int ret;
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ret = sps_setup_bam2bam_fifo(data,
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IPA_OCIMEM_DL_IPA_DATA_FIFO_OFST,
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ipa_get_data_fifo_sz(dir, type), 1);
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if (ret) {
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IPAERR("DAFIFO setup fail %d dir %d type %d\n",
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ret, dir, type);
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return ret;
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}
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ret = sps_setup_bam2bam_fifo(desc,
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IPA_OCIMEM_DL_IPA_DESC_FIFO_OFST,
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ipa_get_desc_fifo_sz(dir, type), 1);
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if (ret) {
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IPAERR("DEFIFO setup fail %d dir %d type %d\n",
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ret, dir, type);
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return ret;
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}
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IPADBG("dir=%d type=%d Dpa=%x Dsz=%u Dva=%p dpa=%x dsz=%u dva=%p\n",
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dir, type, data->phys_base, data->size, data->base,
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desc->phys_base, desc->size, desc->base);
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return 0;
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}
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int ipa_setup_a2_dma_fifos(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type,
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struct sps_mem_buffer *desc,
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struct sps_mem_buffer *data)
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{
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int ret;
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if (type == IPA_BRIDGE_TYPE_TETHERED) {
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if (dir == IPA_BRIDGE_DIR_UL) {
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desc->base = ipa_ctx->smem_pipe_mem +
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IPA_SMEM_UL_DESC_FIFO_OFST;
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desc->phys_base = smem_virt_to_phys(desc->base);
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desc->size = ipa_get_desc_fifo_sz(dir, type);
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data->base = ipa_ctx->smem_pipe_mem +
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IPA_SMEM_UL_DATA_FIFO_OFST;
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data->phys_base = smem_virt_to_phys(data->base);
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data->size = ipa_get_data_fifo_sz(dir, type);
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} else {
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desc->base = ipa_ctx->smem_pipe_mem +
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IPA_SMEM_DL_DESC_FIFO_OFST;
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desc->phys_base = smem_virt_to_phys(desc->base);
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desc->size = ipa_get_desc_fifo_sz(dir, type);
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data->base = ipa_ctx->smem_pipe_mem +
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IPA_SMEM_DL_DATA_FIFO_OFST;
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data->phys_base = smem_virt_to_phys(data->base);
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data->size = ipa_get_data_fifo_sz(dir, type);
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}
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} else {
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if (dir == IPA_BRIDGE_DIR_UL) {
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desc->base = ipa_ctx->smem_pipe_mem +
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IPA_SMEM_UL_EMB_DESC_FIFO_OFST;
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desc->phys_base = smem_virt_to_phys(desc->base);
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desc->size = ipa_get_desc_fifo_sz(dir, type);
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data->base = ipa_ctx->smem_pipe_mem +
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IPA_SMEM_UL_EMB_DATA_FIFO_OFST;
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data->phys_base = smem_virt_to_phys(data->base);
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data->size = ipa_get_data_fifo_sz(dir, type);
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} else {
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ret = sps_setup_bam2bam_fifo(data,
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IPA_OCIMEM_DL_A2_DATA_FIFO_OFST,
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ipa_get_data_fifo_sz(dir, type), 1);
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if (ret) {
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IPAERR("DAFIFO setup fail %d dir %d type %d\n",
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ret, dir, type);
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return ret;
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}
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ret = sps_setup_bam2bam_fifo(desc,
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IPA_OCIMEM_DL_A2_DESC_FIFO_OFST,
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ipa_get_desc_fifo_sz(dir, type), 1);
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if (ret) {
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IPAERR("DEFIFO setup fail %d dir %d type %d\n",
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ret, dir, type);
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return ret;
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}
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}
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}
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IPADBG("dir=%d type=%d Dpa=%x Dsz=%u Dva=%p dpa=%x dsz=%u dva=%p\n",
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dir, type, data->phys_base, data->size, data->base,
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desc->phys_base, desc->size, desc->base);
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return 0;
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}
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static int setup_dma_bam_bridge(enum ipa_bridge_dir dir,
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enum ipa_bridge_type type,
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struct ipa_sys_connect_params *props,
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u32 *clnt_hdl)
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{
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struct ipa_connect_params ipa_in_params;
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struct ipa_sps_params sps_out_params;
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int dma_a2_pipe;
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int dma_ipa_pipe;
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struct sps_pipe *pipe;
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struct sps_pipe *pipe_a2;
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struct sps_connect _connection;
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struct sps_connect *connection = &_connection;
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struct a2_mux_pipe_connection pipe_conn = {0};
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enum a2_mux_pipe_direction pipe_dir;
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u32 dma_hdl = sps_dma_get_bam_handle();
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u32 a2_hdl;
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u32 pa;
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int ret;
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memset(&ipa_in_params, 0, sizeof(ipa_in_params));
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memset(&sps_out_params, 0, sizeof(sps_out_params));
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pipe_dir = (dir == IPA_BRIDGE_DIR_UL) ? IPA_TO_A2 : A2_TO_IPA;
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ret = ipa_get_a2_mux_pipe_info(pipe_dir, &pipe_conn);
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if (ret) {
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IPAERR("ipa_get_a2_mux_pipe_info failed dir=%d type=%d\n",
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dir, type);
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goto fail_get_a2_prop;
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}
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pa = (dir == IPA_BRIDGE_DIR_UL) ? pipe_conn.dst_phy_addr :
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pipe_conn.src_phy_addr;
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ret = sps_phy2h(pa, &a2_hdl);
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if (ret) {
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IPAERR("sps_phy2h failed (A2 BAM) %d dir=%d type=%d\n",
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ret, dir, type);
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goto fail_get_a2_prop;
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}
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ipa_get_dma_pipe_num(dir, type, &dma_a2_pipe, &dma_ipa_pipe);
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ipa_in_params.ipa_ep_cfg = props->ipa_ep_cfg;
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ipa_in_params.client = props->client;
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ipa_in_params.client_bam_hdl = dma_hdl;
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ipa_in_params.client_ep_idx = dma_ipa_pipe;
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ipa_in_params.priv = props->priv;
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ipa_in_params.notify = props->notify;
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ipa_in_params.desc_fifo_sz = ipa_get_desc_fifo_sz(dir, type);
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ipa_in_params.data_fifo_sz = ipa_get_data_fifo_sz(dir, type);
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if (type == IPA_BRIDGE_TYPE_EMBEDDED && dir == IPA_BRIDGE_DIR_DL) {
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if (ipa_setup_ipa_dma_fifos(dir, type, &ipa_in_params.desc,
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&ipa_in_params.data)) {
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IPAERR("fail to setup IPA-DMA FIFOs dir=%d type=%d\n",
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dir, type);
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goto fail_get_a2_prop;
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}
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}
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if (ipa_connect(&ipa_in_params, &sps_out_params, clnt_hdl)) {
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IPAERR("ipa connect failed dir=%d type=%d\n", dir, type);
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goto fail_get_a2_prop;
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}
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pipe = sps_alloc_endpoint();
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if (pipe == NULL) {
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IPAERR("sps_alloc_endpoint failed dir=%d type=%d\n", dir, type);
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ret = -ENOMEM;
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goto fail_sps_alloc;
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}
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memset(&_connection, 0, sizeof(_connection));
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ret = sps_get_config(pipe, connection);
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if (ret) {
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IPAERR("sps_get_config failed %d dir=%d type=%d\n", ret, dir,
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type);
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goto fail_sps_get_config;
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}
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if (dir == IPA_BRIDGE_DIR_DL) {
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connection->mode = SPS_MODE_SRC;
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connection->source = dma_hdl;
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connection->destination = sps_out_params.ipa_bam_hdl;
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connection->src_pipe_index = dma_ipa_pipe;
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connection->dest_pipe_index = sps_out_params.ipa_ep_idx;
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} else {
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connection->mode = SPS_MODE_DEST;
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connection->source = sps_out_params.ipa_bam_hdl;
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connection->destination = dma_hdl;
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connection->src_pipe_index = sps_out_params.ipa_ep_idx;
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connection->dest_pipe_index = dma_ipa_pipe;
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}
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connection->event_thresh = IPA_EVENT_THRESHOLD;
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connection->data = sps_out_params.data;
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connection->desc = sps_out_params.desc;
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connection->options = SPS_O_AUTO_ENABLE;
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ret = sps_connect(pipe, connection);
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if (ret) {
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IPAERR("sps_connect failed %d dir=%d type=%d\n", ret, dir,
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type);
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goto fail_sps_get_config;
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}
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|
||
|
if (dir == IPA_BRIDGE_DIR_DL) {
|
||
|
bridge[type].pipe[IPA_DL_TO_IPA].pipe = pipe;
|
||
|
bridge[type].pipe[IPA_DL_TO_IPA].ipa_facing = true;
|
||
|
bridge[type].pipe[IPA_DL_TO_IPA].valid = true;
|
||
|
} else {
|
||
|
bridge[type].pipe[IPA_UL_FROM_IPA].pipe = pipe;
|
||
|
bridge[type].pipe[IPA_UL_FROM_IPA].ipa_facing = true;
|
||
|
bridge[type].pipe[IPA_UL_FROM_IPA].valid = true;
|
||
|
}
|
||
|
|
||
|
IPADBG("dir=%d type=%d (ipa) src(0x%x:%u)->dst(0x%x:%u)\n", dir, type,
|
||
|
connection->source, connection->src_pipe_index,
|
||
|
connection->destination, connection->dest_pipe_index);
|
||
|
|
||
|
pipe_a2 = sps_alloc_endpoint();
|
||
|
if (pipe_a2 == NULL) {
|
||
|
IPAERR("sps_alloc_endpoint failed2 dir=%d type=%d\n", dir,
|
||
|
type);
|
||
|
ret = -ENOMEM;
|
||
|
goto fail_sps_alloc_a2;
|
||
|
}
|
||
|
|
||
|
memset(&_connection, 0, sizeof(_connection));
|
||
|
ret = sps_get_config(pipe_a2, connection);
|
||
|
if (ret) {
|
||
|
IPAERR("sps_get_config failed2 %d dir=%d type=%d\n", ret, dir,
|
||
|
type);
|
||
|
goto fail_sps_get_config_a2;
|
||
|
}
|
||
|
|
||
|
if (dir == IPA_BRIDGE_DIR_DL) {
|
||
|
connection->mode = SPS_MODE_DEST;
|
||
|
connection->source = a2_hdl;
|
||
|
connection->destination = dma_hdl;
|
||
|
connection->src_pipe_index = ipa_get_a2_pipe_num(dir, type);
|
||
|
connection->dest_pipe_index = dma_a2_pipe;
|
||
|
} else {
|
||
|
connection->mode = SPS_MODE_SRC;
|
||
|
connection->source = dma_hdl;
|
||
|
connection->destination = a2_hdl;
|
||
|
connection->src_pipe_index = dma_a2_pipe;
|
||
|
connection->dest_pipe_index = ipa_get_a2_pipe_num(dir, type);
|
||
|
}
|
||
|
|
||
|
connection->event_thresh = IPA_EVENT_THRESHOLD;
|
||
|
|
||
|
if (ipa_setup_a2_dma_fifos(dir, type, &connection->desc,
|
||
|
&connection->data)) {
|
||
|
IPAERR("fail to setup A2-DMA FIFOs dir=%d type=%d\n",
|
||
|
dir, type);
|
||
|
goto fail_sps_get_config_a2;
|
||
|
}
|
||
|
|
||
|
connection->options = SPS_O_AUTO_ENABLE;
|
||
|
|
||
|
ret = sps_connect(pipe_a2, connection);
|
||
|
if (ret) {
|
||
|
IPAERR("sps_connect failed2 %d dir=%d type=%d\n", ret, dir,
|
||
|
type);
|
||
|
goto fail_sps_get_config_a2;
|
||
|
}
|
||
|
|
||
|
if (dir == IPA_BRIDGE_DIR_DL) {
|
||
|
bridge[type].pipe[IPA_DL_FROM_A2].pipe = pipe_a2;
|
||
|
bridge[type].pipe[IPA_DL_FROM_A2].valid = true;
|
||
|
} else {
|
||
|
bridge[type].pipe[IPA_UL_TO_A2].pipe = pipe_a2;
|
||
|
bridge[type].pipe[IPA_UL_TO_A2].valid = true;
|
||
|
}
|
||
|
|
||
|
IPADBG("dir=%d type=%d (a2) src(0x%x:%u)->dst(0x%x:%u)\n", dir, type,
|
||
|
connection->source, connection->src_pipe_index,
|
||
|
connection->destination, connection->dest_pipe_index);
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
fail_sps_get_config_a2:
|
||
|
sps_free_endpoint(pipe_a2);
|
||
|
fail_sps_alloc_a2:
|
||
|
sps_disconnect(pipe);
|
||
|
fail_sps_get_config:
|
||
|
sps_free_endpoint(pipe);
|
||
|
fail_sps_alloc:
|
||
|
ipa_disconnect(*clnt_hdl);
|
||
|
fail_get_a2_prop:
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* ipa_bridge_init()
|
||
|
*
|
||
|
* Return codes: 0: success, -ENOMEM: failure
|
||
|
*/
|
||
|
int ipa_bridge_init(void)
|
||
|
{
|
||
|
int i;
|
||
|
|
||
|
ipa_ctx->smem_pipe_mem = smem_alloc2(SMEM_BAM_PIPE_MEMORY,
|
||
|
IPA_SMEM_PIPE_MEM_SZ);
|
||
|
if (!ipa_ctx->smem_pipe_mem) {
|
||
|
IPAERR("smem alloc failed\n");
|
||
|
return -ENOMEM;
|
||
|
}
|
||
|
IPADBG("smem_pipe_mem = %p\n", ipa_ctx->smem_pipe_mem);
|
||
|
|
||
|
for (i = 0; i < IPA_BRIDGE_TYPE_MAX; i++)
|
||
|
bridge[i].type = i;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* ipa_bridge_setup() - setup SW bridge leg
|
||
|
* @dir: downlink or uplink (from air interface perspective)
|
||
|
* @type: tethered or embedded bridge
|
||
|
* @props: bridge leg properties (EP config, callbacks, etc)
|
||
|
* @clnt_hdl: [out] handle of IPA EP belonging to bridge leg
|
||
|
*
|
||
|
* NOTE: IT IS CALLER'S RESPONSIBILITY TO ENSURE BAMs ARE
|
||
|
* OPERATIONAL AS LONG AS BRIDGE REMAINS UP
|
||
|
*
|
||
|
* Return codes:
|
||
|
* 0: success
|
||
|
* various negative error codes on errors
|
||
|
*/
|
||
|
int ipa_bridge_setup(enum ipa_bridge_dir dir, enum ipa_bridge_type type,
|
||
|
struct ipa_sys_connect_params *props, u32 *clnt_hdl)
|
||
|
{
|
||
|
int ret;
|
||
|
|
||
|
if (props == NULL || clnt_hdl == NULL ||
|
||
|
type >= IPA_BRIDGE_TYPE_MAX || dir >= IPA_BRIDGE_DIR_MAX ||
|
||
|
props->client >= IPA_CLIENT_MAX) {
|
||
|
IPAERR("Bad param props=%p clnt_hdl=%p type=%d dir=%d\n",
|
||
|
props, clnt_hdl, type, dir);
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
ipa_inc_client_enable_clks();
|
||
|
|
||
|
if (setup_dma_bam_bridge(dir, type, props, clnt_hdl)) {
|
||
|
IPAERR("fail to setup SYS pipe to IPA dir=%d type=%d\n",
|
||
|
dir, type);
|
||
|
ret = -EINVAL;
|
||
|
goto bail_ipa;
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
bail_ipa:
|
||
|
ipa_dec_client_disable_clks();
|
||
|
return ret;
|
||
|
}
|
||
|
EXPORT_SYMBOL(ipa_bridge_setup);
|
||
|
|
||
|
/**
|
||
|
* ipa_bridge_teardown() - teardown SW bridge leg
|
||
|
* @dir: downlink or uplink (from air interface perspective)
|
||
|
* @type: tethered or embedded bridge
|
||
|
* @clnt_hdl: handle of IPA EP
|
||
|
*
|
||
|
* Return codes:
|
||
|
* 0: success
|
||
|
* various negative error codes on errors
|
||
|
*/
|
||
|
int ipa_bridge_teardown(enum ipa_bridge_dir dir, enum ipa_bridge_type type,
|
||
|
u32 clnt_hdl)
|
||
|
{
|
||
|
struct ipa_bridge_pipe_context *sys;
|
||
|
int lo;
|
||
|
int hi;
|
||
|
|
||
|
if (dir >= IPA_BRIDGE_DIR_MAX || type >= IPA_BRIDGE_TYPE_MAX ||
|
||
|
clnt_hdl >= IPA_NUM_PIPES || ipa_ctx->ep[clnt_hdl].valid == 0) {
|
||
|
IPAERR("Bad param dir=%d type=%d\n", dir, type);
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
if (dir == IPA_BRIDGE_DIR_UL) {
|
||
|
lo = IPA_UL_FROM_IPA;
|
||
|
hi = IPA_UL_TO_A2;
|
||
|
} else {
|
||
|
lo = IPA_DL_FROM_A2;
|
||
|
hi = IPA_DL_TO_IPA;
|
||
|
}
|
||
|
|
||
|
for (; lo <= hi; lo++) {
|
||
|
sys = &bridge[type].pipe[lo];
|
||
|
if (sys->valid) {
|
||
|
if (sys->ipa_facing)
|
||
|
ipa_disconnect(clnt_hdl);
|
||
|
sps_disconnect(sys->pipe);
|
||
|
sps_free_endpoint(sys->pipe);
|
||
|
sys->valid = false;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
memset(&ipa_ctx->ep[clnt_hdl], 0, sizeof(struct ipa_ep_context));
|
||
|
|
||
|
ipa_dec_client_disable_clks();
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
EXPORT_SYMBOL(ipa_bridge_teardown);
|
||
|
|
||
|
bool ipa_emb_ul_pipes_empty(void)
|
||
|
{
|
||
|
struct sps_pipe *emb_ipa_ul =
|
||
|
ipa_ctx->sys[IPA_A5_LAN_WAN_OUT].ep->ep_hdl;
|
||
|
struct sps_pipe *emb_ipa_to_dma =
|
||
|
bridge[IPA_BRIDGE_TYPE_EMBEDDED].pipe[IPA_UL_FROM_IPA].pipe;
|
||
|
struct sps_pipe *emb_dma_to_a2 =
|
||
|
bridge[IPA_BRIDGE_TYPE_EMBEDDED].pipe[IPA_UL_TO_A2].pipe;
|
||
|
u32 emb_ipa_ul_empty;
|
||
|
u32 emb_ipa_to_dma_empty;
|
||
|
u32 emb_dma_to_a2_empty;
|
||
|
|
||
|
if (sps_is_pipe_empty(emb_ipa_ul, &emb_ipa_ul_empty)) {
|
||
|
IPAERR("emb_ip_ul pipe empty check fail\n");
|
||
|
return false;
|
||
|
}
|
||
|
|
||
|
if (sps_is_pipe_empty(emb_ipa_to_dma, &emb_ipa_to_dma_empty)) {
|
||
|
IPAERR("emb_ipa_to_dma pipe empty check fail\n");
|
||
|
return false;
|
||
|
}
|
||
|
|
||
|
if (sps_is_pipe_empty(emb_dma_to_a2, &emb_dma_to_a2_empty)) {
|
||
|
IPAERR("emb_dma_to_a2 pipe empty check fail\n");
|
||
|
return false;
|
||
|
}
|
||
|
|
||
|
return emb_ipa_ul_empty && emb_ipa_to_dma_empty && emb_dma_to_a2_empty;
|
||
|
}
|
||
|
EXPORT_SYMBOL(ipa_emb_ul_pipes_empty);
|