324 lines
8.5 KiB
C
324 lines
8.5 KiB
C
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/* linux/arch/arm/plat-samsung/include/plat/pll.h
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*
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* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* Samsung PLL codes
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <asm/div64.h>
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#define S3C24XX_PLL_MDIV_MASK (0xFF)
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#define S3C24XX_PLL_PDIV_MASK (0x1F)
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#define S3C24XX_PLL_SDIV_MASK (0x3)
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#define S3C24XX_PLL_MDIV_SHIFT (12)
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#define S3C24XX_PLL_PDIV_SHIFT (4)
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#define S3C24XX_PLL_SDIV_SHIFT (0)
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static inline unsigned int s3c24xx_get_pll(unsigned int pllval,
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unsigned int baseclk)
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{
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unsigned int mdiv, pdiv, sdiv;
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uint64_t fvco;
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mdiv = (pllval >> S3C24XX_PLL_MDIV_SHIFT) & S3C24XX_PLL_MDIV_MASK;
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pdiv = (pllval >> S3C24XX_PLL_PDIV_SHIFT) & S3C24XX_PLL_PDIV_MASK;
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sdiv = (pllval >> S3C24XX_PLL_SDIV_SHIFT) & S3C24XX_PLL_SDIV_MASK;
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fvco = (uint64_t)baseclk * (mdiv + 8);
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do_div(fvco, (pdiv + 2) << sdiv);
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return (unsigned int)fvco;
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}
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#define S3C2416_PLL_MDIV_MASK (0x3FF)
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#define S3C2416_PLL_PDIV_MASK (0x3F)
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#define S3C2416_PLL_SDIV_MASK (0x7)
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#define S3C2416_PLL_MDIV_SHIFT (14)
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#define S3C2416_PLL_PDIV_SHIFT (5)
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#define S3C2416_PLL_SDIV_SHIFT (0)
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static inline unsigned int s3c2416_get_pll(unsigned int pllval,
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unsigned int baseclk)
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{
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unsigned int mdiv, pdiv, sdiv;
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uint64_t fvco;
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mdiv = (pllval >> S3C2416_PLL_MDIV_SHIFT) & S3C2416_PLL_MDIV_MASK;
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pdiv = (pllval >> S3C2416_PLL_PDIV_SHIFT) & S3C2416_PLL_PDIV_MASK;
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sdiv = (pllval >> S3C2416_PLL_SDIV_SHIFT) & S3C2416_PLL_SDIV_MASK;
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fvco = (uint64_t)baseclk * mdiv;
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do_div(fvco, (pdiv << sdiv));
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return (unsigned int)fvco;
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}
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#define S3C6400_PLL_MDIV_MASK (0x3FF)
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#define S3C6400_PLL_PDIV_MASK (0x3F)
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#define S3C6400_PLL_SDIV_MASK (0x7)
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#define S3C6400_PLL_MDIV_SHIFT (16)
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#define S3C6400_PLL_PDIV_SHIFT (8)
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#define S3C6400_PLL_SDIV_SHIFT (0)
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static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
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u32 pllcon)
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{
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u32 mdiv, pdiv, sdiv;
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u64 fvco = baseclk;
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mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK;
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pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK;
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sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK;
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fvco *= mdiv;
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do_div(fvco, (pdiv << sdiv));
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return (unsigned long)fvco;
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}
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#define PLL6553X_MDIV_MASK (0x7F)
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#define PLL6553X_PDIV_MASK (0x1F)
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#define PLL6553X_SDIV_MASK (0x3)
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#define PLL6553X_KDIV_MASK (0xFFFF)
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#define PLL6553X_MDIV_SHIFT (16)
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#define PLL6553X_PDIV_SHIFT (8)
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#define PLL6553X_SDIV_SHIFT (0)
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static inline unsigned long s3c_get_pll6553x(unsigned long baseclk,
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u32 pll_con0, u32 pll_con1)
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{
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unsigned long result;
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u32 mdiv, pdiv, sdiv, kdiv;
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u64 tmp;
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mdiv = (pll_con0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK;
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pdiv = (pll_con0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK;
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sdiv = (pll_con0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK;
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kdiv = pll_con1 & PLL6553X_KDIV_MASK;
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/*
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* We need to multiple baseclk by mdiv (the integer part) and kdiv
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* which is in 2^16ths, so shift mdiv up (does not overflow) and
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* add kdiv before multiplying. The use of tmp is to avoid any
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* overflows before shifting bac down into result when multipling
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* by the mdiv and kdiv pair.
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*/
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tmp = baseclk;
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tmp *= (mdiv << 16) + kdiv;
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do_div(tmp, (pdiv << sdiv));
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result = tmp >> 16;
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return result;
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}
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#define PLL35XX_MDIV_MASK (0x3FF)
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#define PLL35XX_PDIV_MASK (0x3F)
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#define PLL35XX_SDIV_MASK (0x7)
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#define PLL35XX_MDIV_SHIFT (16)
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#define PLL35XX_PDIV_SHIFT (8)
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#define PLL35XX_SDIV_SHIFT (0)
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static inline unsigned long s5p_get_pll35xx(unsigned long baseclk, u32 pll_con)
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{
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u32 mdiv, pdiv, sdiv;
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u64 fvco = baseclk;
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mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK;
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pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
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sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK;
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fvco *= mdiv;
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do_div(fvco, (pdiv << sdiv));
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return (unsigned long)fvco;
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}
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#define PLL36XX_KDIV_MASK (0xFFFF)
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#define PLL36XX_MDIV_MASK (0x1FF)
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#define PLL36XX_PDIV_MASK (0x3F)
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#define PLL36XX_SDIV_MASK (0x7)
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#define PLL36XX_MDIV_SHIFT (16)
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#define PLL36XX_PDIV_SHIFT (8)
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#define PLL36XX_SDIV_SHIFT (0)
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static inline unsigned long s5p_get_pll36xx(unsigned long baseclk,
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u32 pll_con0, u32 pll_con1)
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{
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unsigned long result;
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u32 mdiv, pdiv, sdiv, kdiv;
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u64 tmp;
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mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;
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pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;
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sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK;
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kdiv = pll_con1 & PLL36XX_KDIV_MASK;
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tmp = baseclk;
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tmp *= (mdiv << 16) + kdiv;
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do_div(tmp, (pdiv << sdiv));
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result = tmp >> 16;
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return result;
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}
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#define PLL45XX_MDIV_MASK (0x3FF)
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#define PLL45XX_PDIV_MASK (0x3F)
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#define PLL45XX_SDIV_MASK (0x7)
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#define PLL45XX_MDIV_SHIFT (16)
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#define PLL45XX_PDIV_SHIFT (8)
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#define PLL45XX_SDIV_SHIFT (0)
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enum pll45xx_type_t {
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pll_4500,
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pll_4502,
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pll_4508
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};
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static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
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enum pll45xx_type_t pll_type)
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{
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u32 mdiv, pdiv, sdiv;
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u64 fvco = baseclk;
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mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
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pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
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sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
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if (pll_type == pll_4508)
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sdiv = sdiv - 1;
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fvco *= mdiv;
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do_div(fvco, (pdiv << sdiv));
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return (unsigned long)fvco;
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}
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/* CON0 bit-fields */
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#define PLL46XX_MDIV_MASK (0x1FF)
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#define PLL46XX_PDIV_MASK (0x3F)
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#define PLL46XX_SDIV_MASK (0x7)
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#define PLL46XX_LOCKED_SHIFT (29)
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#define PLL46XX_MDIV_SHIFT (16)
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#define PLL46XX_PDIV_SHIFT (8)
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#define PLL46XX_SDIV_SHIFT (0)
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/* CON1 bit-fields */
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#define PLL46XX_MRR_MASK (0x1F)
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#define PLL46XX_MFR_MASK (0x3F)
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#define PLL46XX_KDIV_MASK (0xFFFF)
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#define PLL4650C_KDIV_MASK (0xFFF)
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#define PLL46XX_MRR_SHIFT (24)
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#define PLL46XX_MFR_SHIFT (16)
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#define PLL46XX_KDIV_SHIFT (0)
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enum pll46xx_type_t {
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pll_4600,
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pll_4650,
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pll_4650c,
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};
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static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
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u32 pll_con0, u32 pll_con1,
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enum pll46xx_type_t pll_type)
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{
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unsigned long result;
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u32 mdiv, pdiv, sdiv, kdiv;
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u64 tmp;
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mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
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pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
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sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
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kdiv = pll_con1 & PLL46XX_KDIV_MASK;
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if (pll_type == pll_4650c)
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kdiv = pll_con1 & PLL4650C_KDIV_MASK;
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else
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kdiv = pll_con1 & PLL46XX_KDIV_MASK;
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tmp = baseclk;
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if (pll_type == pll_4600) {
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tmp *= (mdiv << 16) + kdiv;
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do_div(tmp, (pdiv << sdiv));
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result = tmp >> 16;
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} else {
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tmp *= (mdiv << 10) + kdiv;
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do_div(tmp, (pdiv << sdiv));
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result = tmp >> 10;
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}
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return result;
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}
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#define PLL90XX_MDIV_MASK (0xFF)
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#define PLL90XX_PDIV_MASK (0x3F)
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#define PLL90XX_SDIV_MASK (0x7)
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#define PLL90XX_KDIV_MASK (0xffff)
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#define PLL90XX_LOCKED_SHIFT (29)
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#define PLL90XX_MDIV_SHIFT (16)
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#define PLL90XX_PDIV_SHIFT (8)
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#define PLL90XX_SDIV_SHIFT (0)
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#define PLL90XX_KDIV_SHIFT (0)
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static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
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u32 pll_con, u32 pll_conk)
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{
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unsigned long result;
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u32 mdiv, pdiv, sdiv, kdiv;
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u64 tmp;
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mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
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pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
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sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
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kdiv = pll_conk & PLL90XX_KDIV_MASK;
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/*
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* We need to multiple baseclk by mdiv (the integer part) and kdiv
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* which is in 2^16ths, so shift mdiv up (does not overflow) and
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* add kdiv before multiplying. The use of tmp is to avoid any
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* overflows before shifting bac down into result when multipling
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* by the mdiv and kdiv pair.
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*/
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tmp = baseclk;
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tmp *= (mdiv << 16) + kdiv;
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do_div(tmp, (pdiv << sdiv));
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result = tmp >> 16;
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return result;
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}
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#define PLL65XX_MDIV_MASK (0x3FF)
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#define PLL65XX_PDIV_MASK (0x3F)
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#define PLL65XX_SDIV_MASK (0x7)
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#define PLL65XX_MDIV_SHIFT (16)
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#define PLL65XX_PDIV_SHIFT (8)
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#define PLL65XX_SDIV_SHIFT (0)
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static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con)
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{
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u32 mdiv, pdiv, sdiv;
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u64 fvco = baseclk;
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mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK;
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pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK;
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sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK;
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fvco *= mdiv;
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do_div(fvco, (pdiv << sdiv));
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return (unsigned long)fvco;
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}
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