316 lines
7.3 KiB
C
316 lines
7.3 KiB
C
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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/cpu.h>
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#include <linux/io.h>
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#include <asm/cputype.h>
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#include <asm/hardware/cache-l2x0.h>
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#define MODULE_NAME "pl310_erp"
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struct pl310_drv_data {
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unsigned int irq;
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unsigned int ecntr;
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unsigned int parrt;
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unsigned int parrd;
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unsigned int errwd;
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unsigned int errwt;
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unsigned int errrt;
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unsigned int errrd;
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unsigned int slverr;
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unsigned int decerr;
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void __iomem *base;
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unsigned int intr_mask_reg;
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};
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#define ECNTR BIT(0)
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#define PARRT BIT(1)
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#define PARRD BIT(2)
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#define ERRWT BIT(3)
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#define ERRWD BIT(4)
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#define ERRRT BIT(5)
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#define ERRRD BIT(6)
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#define SLVERR BIT(7)
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#define DECERR BIT(8)
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static irqreturn_t pl310_erp_irq(int irq, void *dev_id)
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{
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struct pl310_drv_data *p = platform_get_drvdata(dev_id);
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uint16_t mask_int_stat, int_clear = 0, error = 0;
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mask_int_stat = readl_relaxed(p->base + L2X0_MASKED_INTR_STAT);
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if (mask_int_stat & ECNTR) {
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pr_alert("Event Counter1/0 Overflow Increment error\n");
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p->ecntr++;
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int_clear = mask_int_stat & ECNTR;
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}
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if (mask_int_stat & PARRT) {
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pr_alert("Read parity error on L2 Tag RAM\n");
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p->parrt++;
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error = 1;
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int_clear = mask_int_stat & PARRT;
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}
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if (mask_int_stat & PARRD) {
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pr_alert("Read parity error on L2 Tag RAM\n");
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p->parrd++;
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error = 1;
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int_clear = mask_int_stat & PARRD;
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}
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if (mask_int_stat & ERRWT) {
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pr_alert("Write error on L2 Tag RAM\n");
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p->errwt++;
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int_clear = mask_int_stat & ERRWT;
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}
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if (mask_int_stat & ERRWD) {
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pr_alert("Write error on L2 Data RAM\n");
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p->errwd++;
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int_clear = mask_int_stat & ERRWD;
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}
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if (mask_int_stat & ERRRT) {
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pr_alert("Read error on L2 Tag RAM\n");
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p->errrt++;
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int_clear = mask_int_stat & ERRRT;
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}
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if (mask_int_stat & ERRRD) {
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pr_alert("Read error on L2 Data RAM\n");
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p->errrd++;
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int_clear = mask_int_stat & ERRRD;
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}
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if (mask_int_stat & DECERR) {
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pr_alert("L2 master port decode error\n");
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p->decerr++;
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int_clear = mask_int_stat & DECERR;
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}
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if (mask_int_stat & SLVERR) {
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pr_alert("L2 slave port error\n");
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p->slverr++;
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int_clear = mask_int_stat & SLVERR;
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}
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writel_relaxed(int_clear, p->base + L2X0_INTR_CLEAR);
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/* Make sure the interrupts are cleared */
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mb();
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/* WARNING will be thrown whenever we receive any L2 interrupt.
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* Other than parity on tag/data ram, irrespective of the bits
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* set we will throw a warning.
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*/
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WARN_ON(!error);
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/* Panic in case we encounter parity error in TAG/DATA Ram */
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BUG_ON(error);
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return IRQ_HANDLED;
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}
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static void pl310_mask_int(struct pl310_drv_data *p, bool enable)
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{
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/* L2CC register contents needs to be saved
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* as it's power rail will be removed during suspend
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*/
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if (enable)
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p->intr_mask_reg = 0x1FF;
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else
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p->intr_mask_reg = 0x0;
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writel_relaxed(p->intr_mask_reg, p->base + L2X0_INTR_MASK);
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/* Make sure Mask is updated */
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mb();
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pr_debug("Mask interrupt 0%x\n",
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readl_relaxed(p->base + L2X0_INTR_MASK));
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}
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static int pl310_erp_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct pl310_drv_data *p = dev_get_drvdata(dev);
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return snprintf(buf, PAGE_SIZE,
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"L2CC Interrupt Number:\t\t\t%d\n"\
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"Event Counter1/0 Overflow Increment:\t%u\n"\
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"Parity Error on L2 Tag RAM (Read):\t%u\n"\
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"Parity Error on L2 Data RAM (Read):\t%u\n"\
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"Error on L2 Tag RAM (Write):\t\t%u\n"\
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"Error on L2 Data RAM (Write):\t\t%u\n"\
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"Error on L2 Tag RAM (Read):\t\t%u\n"\
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"Error on L2 Data RAM (Read):\t\t%u\n"\
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"SLave Error from L3 Port:\t\t%u\n"\
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"Decode Error from L3 Port:\t\t%u\n",
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p->irq, p->ecntr, p->parrt, p->parrd, p->errwt, p->errwd,
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p->errrt, p->errrd, p->slverr, p->decerr);
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}
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static DEVICE_ATTR(cache_erp, 0664, pl310_erp_show, NULL);
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static int __init pl310_create_sysfs(struct device *dev)
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{
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/* create a sysfs entry at
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* /sys/devices/platform/pl310_erp/cache_erp
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*/
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return device_create_file(dev, &dev_attr_cache_erp);
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}
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static int __devinit pl310_cache_erp_probe(struct platform_device *pdev)
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{
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struct resource *r;
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struct pl310_drv_data *drv_data;
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int ret;
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drv_data = devm_kzalloc(&pdev->dev, sizeof(struct pl310_drv_data),
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GFP_KERNEL);
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if (drv_data == NULL) {
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dev_err(&pdev->dev, "cannot allocate memory\n");
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ret = -ENOMEM;
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goto error;
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}
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!r) {
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dev_err(&pdev->dev, "No L2 base address\n");
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ret = -ENODEV;
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goto error;
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}
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if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r),
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"erp")) {
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ret = -EBUSY;
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goto error;
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}
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drv_data->base = devm_ioremap_nocache(&pdev->dev, r->start,
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resource_size(r));
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if (!drv_data->base) {
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dev_err(&pdev->dev, "errored to ioremap 0x%x\n", r->start);
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ret = -ENOMEM;
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goto error;
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}
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dev_dbg(&pdev->dev, "L2CC base 0x%p\n", drv_data->base);
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r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "l2_irq");
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if (!r) {
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dev_err(&pdev->dev, "No L2 IRQ resource\n");
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ret = -ENODEV;
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goto error;
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}
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drv_data->irq = r->start;
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ret = devm_request_irq(&pdev->dev, drv_data->irq, pl310_erp_irq,
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IRQF_TRIGGER_RISING, "l2cc_intr", pdev);
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if (ret) {
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dev_err(&pdev->dev, "request irq for L2 interrupt failed\n");
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goto error;
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}
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platform_set_drvdata(pdev, drv_data);
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pl310_mask_int(drv_data, true);
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ret = pl310_create_sysfs(&pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to create sysfs entry\n");
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goto sysfs_err;
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}
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return 0;
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sysfs_err:
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platform_set_drvdata(pdev, NULL);
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pl310_mask_int(drv_data, false);
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error:
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return ret;
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}
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static int __devexit pl310_cache_erp_remove(struct platform_device *pdev)
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{
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struct pl310_drv_data *p = platform_get_drvdata(pdev);
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pl310_mask_int(p, false);
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device_remove_file(&pdev->dev, &dev_attr_cache_erp);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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#ifdef CONFIG_PM
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static int pl310_suspend(struct device *dev)
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{
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struct pl310_drv_data *p = dev_get_drvdata(dev);
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disable_irq(p->irq);
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return 0;
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}
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static int pl310_resume_early(struct device *dev)
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{
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struct pl310_drv_data *p = dev_get_drvdata(dev);
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pl310_mask_int(p, true);
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enable_irq(p->irq);
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return 0;
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}
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static const struct dev_pm_ops pl310_cache_pm_ops = {
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.suspend = pl310_suspend,
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.resume_early = pl310_resume_early,
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};
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#endif
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static struct platform_driver pl310_cache_erp_driver = {
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.probe = pl310_cache_erp_probe,
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.remove = __devexit_p(pl310_cache_erp_remove),
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.driver = {
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.name = MODULE_NAME,
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.owner = THIS_MODULE,
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#ifdef CONFIG_PM
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.pm = &pl310_cache_pm_ops,
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#endif
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},
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};
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static int __init pl310_cache_erp_init(void)
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{
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return platform_driver_register(&pl310_cache_erp_driver);
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}
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module_init(pl310_cache_erp_init);
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static void __exit pl310_cache_erp_exit(void)
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{
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platform_driver_unregister(&pl310_cache_erp_driver);
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}
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module_exit(pl310_cache_erp_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("PL310 cache error reporting driver");
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