191 lines
5.0 KiB
C
191 lines
5.0 KiB
C
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/*
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* arch/arm/mach-h720x/include/mach/hardware.h
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*
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* Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc.
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* (C) 2003 Thomas Gleixner <tglx@linutronix.de>
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* (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
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*
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* This file contains the hardware definitions of the h720x processors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Do not add implementations specific defines here. This files contains
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* only defines of the onchip peripherals. Add those defines to boards.h,
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* which is included by this file.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#define IOCLK (3686400L)
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/* Onchip peripherals */
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#define IO_VIRT 0xf0000000 /* IO peripherals */
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#define IO_PHYS 0x80000000
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#define IO_SIZE 0x00050000
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#ifdef CONFIG_CPU_H7202
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#include "h7202-regs.h"
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#elif defined CONFIG_CPU_H7201
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#include "h7201-regs.h"
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#else
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#error machine definition mismatch
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#endif
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/* Macro to access the CPU IO */
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#define CPU_IO(x) (*(volatile u32*)(x))
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/* Macro to access general purpose regs (base, offset) */
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#define CPU_REG(x,y) CPU_IO(x+y)
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/* Macro to access irq related regs */
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#define IRQ_REG(x) CPU_REG(IRQC_VIRT,x)
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/* CPU registers */
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/* general purpose I/O */
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#define GPIO_VIRT(x) (IO_VIRT + 0x23000 + ((x)<<5))
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#define GPIO_A_VIRT (GPIO_VIRT(0))
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#define GPIO_B_VIRT (GPIO_VIRT(1))
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#define GPIO_C_VIRT (GPIO_VIRT(2))
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#define GPIO_D_VIRT (GPIO_VIRT(3))
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#define GPIO_E_VIRT (GPIO_VIRT(4))
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#define GPIO_AMULSEL (GPIO_VIRT(0) + 0xA4)
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#define AMULSEL_USIN2 (1<<5)
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#define AMULSEL_USOUT2 (1<<6)
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#define AMULSEL_USIN3 (1<<13)
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#define AMULSEL_USOUT3 (1<<14)
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#define AMULSEL_IRDIN (1<<15)
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#define AMULSEL_IRDOUT (1<<7)
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/* Register offsets general purpose I/O */
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#define GPIO_DATA 0x00
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#define GPIO_DIR 0x04
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#define GPIO_MASK 0x08
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#define GPIO_STAT 0x0C
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#define GPIO_EDGE 0x10
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#define GPIO_CLR 0x14
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#define GPIO_POL 0x18
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#define GPIO_EN 0x1C
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/*interrupt controller */
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#define IRQC_VIRT (IO_VIRT + 0x24000)
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/* register offset interrupt controller */
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#define IRQC_IER 0x00
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#define IRQC_ISR 0x04
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/* timer unit */
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#define TIMER_VIRT (IO_VIRT + 0x25000)
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/* Register offsets timer unit */
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#define TM0_PERIOD 0x00
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#define TM0_COUNT 0x08
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#define TM0_CTRL 0x10
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#define TM1_PERIOD 0x20
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#define TM1_COUNT 0x28
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#define TM1_CTRL 0x30
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#define TM2_PERIOD 0x40
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#define TM2_COUNT 0x48
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#define TM2_CTRL 0x50
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#define TIMER_TOPCTRL 0x60
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#define TIMER_TOPSTAT 0x64
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#define T64_COUNTL 0x80
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#define T64_COUNTH 0x84
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#define T64_CTRL 0x88
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#define T64_BASEL 0x94
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#define T64_BASEH 0x98
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/* Bitmaks timer unit TOPSTAT reg */
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#define TSTAT_T0INT 0x1
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#define TSTAT_T1INT 0x2
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#define TSTAT_T2INT 0x4
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#define TSTAT_T3INT 0x8
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/* Bit description of TMx_CTRL register */
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#define TM_START 0x1
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#define TM_REPEAT 0x2
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#define TM_RESET 0x4
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/* Bit description of TIMER_CTRL register */
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#define ENABLE_TM0_INTR 0x1
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#define ENABLE_TM1_INTR 0x2
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#define ENABLE_TM2_INTR 0x4
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#define TIMER_ENABLE_BIT 0x8
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#define ENABLE_TIMER64 0x10
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#define ENABLE_TIMER64_INT 0x20
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/* PMU & PLL */
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#define PMU_BASE (IO_VIRT + 0x1000)
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#define PMU_MODE 0x00
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#define PMU_STAT 0x20
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#define PMU_PLL_CTRL 0x28
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/* PMU Mode bits */
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#define PMU_MODE_SLOW 0x00
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#define PMU_MODE_RUN 0x01
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#define PMU_MODE_IDLE 0x02
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#define PMU_MODE_SLEEP 0x03
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#define PMU_MODE_INIT 0x04
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#define PMU_MODE_DEEPSLEEP 0x07
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#define PMU_MODE_WAKEUP 0x08
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/* PMU ... */
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#define PLL_2_EN 0x8000
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#define PLL_1_EN 0x4000
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#define PLL_3_MUTE 0x0080
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/* Control bits for PMU/ PLL */
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#define PMU_WARMRESET 0x00010000
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#define PLL_CTRL_MASK23 0x000080ff
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/* LCD Controller */
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#define LCD_BASE (IO_VIRT + 0x10000)
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#define LCD_CTRL 0x00
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#define LCD_STATUS 0x04
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#define LCD_STATUS_M 0x08
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#define LCD_INTERRUPT 0x0C
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#define LCD_DBAR 0x10
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#define LCD_DCAR 0x14
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#define LCD_TIMING0 0x20
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#define LCD_TIMING1 0x24
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#define LCD_TIMING2 0x28
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#define LCD_TEST 0x40
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/* LCD Control Bits */
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#define LCD_CTRL_LCD_ENABLE 0x00000001
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/* Bits per pixel */
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#define LCD_CTRL_LCD_BPP_MASK 0x00000006
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#define LCD_CTRL_LCD_4BPP 0x00000000
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#define LCD_CTRL_LCD_8BPP 0x00000002
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#define LCD_CTRL_LCD_16BPP 0x00000004
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#define LCD_CTRL_LCD_BW 0x00000008
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#define LCD_CTRL_LCD_TFT 0x00000010
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#define LCD_CTRL_BGR 0x00001000
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#define LCD_CTRL_LCD_VCOMP 0x00080000
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#define LCD_CTRL_LCD_MONO8 0x00200000
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#define LCD_CTRL_LCD_PWR 0x00400000
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#define LCD_CTRL_LCD_BLE 0x00800000
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#define LCD_CTRL_LDBUSEN 0x01000000
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/* Palette */
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#define LCD_PALETTE_BASE (IO_VIRT + 0x10400)
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/* Serial ports */
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#define SERIAL0_OFS 0x20000
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#define SERIAL0_VIRT (IO_VIRT + SERIAL0_OFS)
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#define SERIAL0_BASE (IO_PHYS + SERIAL0_OFS)
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#define SERIAL1_OFS 0x21000
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#define SERIAL1_VIRT (IO_VIRT + SERIAL1_OFS)
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#define SERIAL1_BASE (IO_PHYS + SERIAL1_OFS)
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#define SERIAL_ENABLE 0x30
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#define SERIAL_ENABLE_EN (1<<0)
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/* General defines to pacify gcc */
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#define __ASM_ARCH_HARDWARE_INCMACH_H
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#include "boards.h"
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#undef __ASM_ARCH_HARDWARE_INCMACH_H
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#endif /* __ASM_ARCH_HARDWARE_H */
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