184 lines
7.9 KiB
Plaintext
184 lines
7.9 KiB
Plaintext
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Qualcomm MDSS MDP
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MDSS is Mobile Display SubSystem which implements Linux framebuffer APIs to
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drive user interface to different panel interfaces. MDP driver is the core of
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MDSS which manage all data paths to different panel interfaces.
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Required properties
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- compatible : Must be "qcom,mdss_mdp"
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- reg : offset and length of the register set for the device.
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- reg-names : names to refer to register sets related to this device
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- interrupts : Interrupt associated with MDSS.
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- vdd-supply : Phandle for vdd regulator device node.
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- qcom,max-clk-rate: Specify maximum MDP core clock rate in hz that this
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device supports.
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- qcom,mdss-pipe-vig-off: Array of offset for MDP source surface pipes of
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type VIG, the offsets are calculated from
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register "mdp_phys" defined in reg property.
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The number of offsets defined here should
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reflect the amount of VIG pipes that can be
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active in MDP for this configuration.
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- qcom,mdss-pipe-vig-fetch-id: Array of shared memory pool fetch ids
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corresponding to the VIG pipe offsets defined in
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previous property, the amount of fetch ids
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defined should match the number of offsets
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defined in property: qcom,mdss-pipe-vig-off
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- qcom,mdss-pipe-rgb-off: Array of offsets for MDP source surface pipes of
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type RGB, the offsets are calculated from
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register "mdp_phys" defined in reg property.
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The number of offsets defined here should
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reflect the amount of RGB pipes that can be
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active in MDP for this configuration.
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- qcom,mdss-pipe-rgb-fetch-id: Array of shared memory pool fetch ids
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corresponding to the RGB pipe offsets defined in
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previous property, the amount of fetch ids
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defined should match the number of offsets
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defined in property: qcom,mdss-pipe-rgb-off
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- qcom,mdss-pipe-dma-off: Array of offsets for MDP source surface pipes of
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type DMA, the offsets are calculated from
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register "mdp_phys" defined in reg property.
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The number of offsets defined here should
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reflect the amount of DMA pipes that can be
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active in MDP for this configuration.
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- qcom,mdss-pipe-dma-fetch-id: Array of shared memory pool fetch ids
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corresponding to the DMA pipe offsets defined in
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previous property, the amount of fetch ids
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defined should match the number of offsets
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defined in property: qcom,mdss-pipe-dma-off
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- qcom,mdss-smp-data: Array of shared memory pool data. There should
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be only two values in this property. The first
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value corresponds to the number of smp blocks
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and the second is the size of each block
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present in the mdss hardware.
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- qcom,mdss-ctl-off: Array of offset addresses for the available ctl
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hw blocks within MDP, these offsets are
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calculated from register "mdp_phys" defined in
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reg property. The number of ctl offsets defined
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here should reflect the number of control paths
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that can be configured concurrently on MDP for
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this configuration.
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- qcom,mdss-wb-off: Array of offset addresses for the progammable
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writeback blocks within MDP. The number of
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offsets defined should match the number of ctl
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blocks defined in property: qcom,mdss-ctl-off
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- qcom,mdss-mixer-intf-off: Array of offset addresses for the available
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mixer blocks that can drive data to panel
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interfaces.
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These offsets are be calculated from register
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"mdp_phys" defined in reg property.
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The number of offsets defined should reflect the
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amount of mixers that can drive data to a panel
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interface.
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- qcom,mdss-dspp-off: Array of offset addresses for the available dspp
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blocks. These offsets are calculated from
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regsiter "mdp_phys" defined in reg property.
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The number of dspp blocks should match the
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number of mixers driving data to interface
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defined in property: qcom,mdss-mixer-intf-off
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- qcom,mdss-pingpong-off: Array of offset addresses for the available
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pingpong blocks. These offsets are calculated
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from regsiter "mdp_phys" defined in reg property.
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The number of pingpong blocks should match the
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number of mixers driving data to interface
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defined in property: qcom,mdss-mixer-intf-off
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- qcom,mdss-mixer-wb-off: Array of offset addresses for the available
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mixer blocks that can be drive data to writeback
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block. These offsets will be calculated from
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register "mdp_phys" defined in reg property.
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The number of writeback mixer offsets defined
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should reflect the number of mixers that can
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drive data to a writeback block.
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- qcom,mdss-intf-off: Array of offset addresses for the available MDP
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video interface blocks that can drive data to a
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panel controller through timing engine.
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The offsets are calculated from "mdp_phys"
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defined in reg property. The number of offsets
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defiend should reflect the number of progammable
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interface blocks avaialble in hardware.
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Optional properties:
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- qcom,vbif-settings : Array with key-value pairs of constant VBIF register
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settings used to setup MDSS QoS for optimum performance.
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The key used should be offset from "vbif_phys" register
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defined in reg property.
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- qcom,mdp-settings : Array with key-value pairs of constant MDP register
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settings used to setup MDSS QoS for best performance.
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The key used should be offset from "mdp_phys" register
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defined in reg property.
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- qcom,mdss-rot-block-size: The size of a memory block (in pixels) to be used
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by the rotator. If this property is not specified,
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then a default value of 128 pixels would be used.
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- qcom,mdss-has-bwc: Boolean property to indicate the presence of bandwidth
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compression feature in the rotator.
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- qcom,mdss-has-decimation: Boolean property to indicate the presence of
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decimation feature in fetch.
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- qcom,mdss-ad-off: Array of offset addresses for the available
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Assertive Display (AD) blocks. These offsets
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are calculated from the register "mdp_phys"
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defined in reg property. The number of AD
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offsets should be less than or equal to the
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number of mixers driving interfaces defined in
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property: qcom,mdss-mixer-intf-off. Assumes
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that AD blocks are aligned with the mixer
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offsets as well (i.e. the first mixer offset
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corresponds to the same pathway as the first
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AD offset).
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Optional subnodes:
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Child nodes representing the frame buffer virtual devices.
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Subnode properties:
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- compatible : Must be "qcom,mdss-fb"
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- cell-index : Index representing frame buffer
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- qcom,mdss-mixer-swap: A boolean property that indicates if the mixer muxes
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need to be swapped based on the target panel.
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By default the property is not defined.
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Example:
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qcom,mdss_mdp@fd900000 {
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compatible = "qcom,mdss_mdp";
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reg = <0xfd900000 0x22100>,
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<0xfd924000 0x1000>;
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reg-names = "mdp_phys", "vbif_phys";
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interrupts = <0 72 0>;
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vdd-supply = <&gdsc_mdss>;
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qcom,max-clk-rate = <320000000>;
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qcom,vbif-settings = <0x0004 0x00000001>,
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<0x00D8 0x00000707>;
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qcom,mdp-settings = <0x02E0 0x000000AA>,
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<0x02E4 0x00000055>;
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qcom,mdss-pipe-vig-off = <0x00001200 0x00001600
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0x00001A00>;
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qcom,mdss-pipe-rgb-off = <0x00001E00 0x00002200
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0x00002600>;
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qcom,mdss-pipe-dma-off = <0x00002A00 0x00002E00>;
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qcom,mdss-pipe-vig-fetch-id = <1 4 7>;
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qcom,mdss-pipe-rgb-fetch-id = <16 17 18>;
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qcom,mdss-pipe-dma-fetch-id = <10 13>;
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qcom,mdss-smp-data = <22 4096>;
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qcom,mdss-rot-block-size = <64>;
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qcom,mdss-has-bwc;
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qcom,mdss-has-decimation;
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qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800
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0x00000900 0x0000A00>;
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qcom,mdss-mixer-intf-off = <0x00003200 0x00003600
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0x00003A00>;
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qcom,mdss-mixer-wb-off = <0x00003E00 0x00004200>;
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qcom,mdss-dspp-off = <0x00004600 0x00004A00 0x00004E00>;
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qcom,mdss-pingpong-off = <0x00012D00 0x00012E00 0x00012F00>;
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qcom,mdss-wb-off = <0x00011100 0x00013100 0x00015100
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0x00017100 0x00019100>;
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qcom,mdss-intf-off = <0x00021100 0x00021300
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0x00021500 0x00021700>;
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mdss_fb0: qcom,mdss_fb_primary {
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cell-index = <0>;
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compatible = "qcom,mdss-fb";
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qcom,mdss-mixer-swap;
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};
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};
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