2024-09-09 08:52:07 +00:00
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/*
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* Driver for GRLIB serial ports (APBUART)
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*
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* Based on linux/drivers/serial/amba.c
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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* Copyright (C) 2003 Konrad Eisele <eiselekd@web.de>
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* Copyright (C) 2006 Daniel Hellstrom <daniel@gaisler.com>, Aeroflex Gaisler AB
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* Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com>
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* Copyright (C) 2009 Kristoffer Glembo <kristoffer@gaisler.com>, Aeroflex Gaisler AB
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*/
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#if defined(CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/kthread.h>
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#include <linux/device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/serial_core.h>
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#include <asm/irq.h>
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#include "apbuart.h"
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#define SERIAL_APBUART_MAJOR TTY_MAJOR
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#define SERIAL_APBUART_MINOR 64
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#define UART_DUMMY_RSR_RX 0x8000 /* for ignore all read */
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static void apbuart_tx_chars(struct uart_port *port);
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static void apbuart_stop_tx(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CTRL(port);
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cr &= ~UART_CTRL_TI;
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UART_PUT_CTRL(port, cr);
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}
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static void apbuart_start_tx(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CTRL(port);
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cr |= UART_CTRL_TI;
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UART_PUT_CTRL(port, cr);
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if (UART_GET_STATUS(port) & UART_STATUS_THE)
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apbuart_tx_chars(port);
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}
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static void apbuart_stop_rx(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CTRL(port);
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cr &= ~(UART_CTRL_RI);
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UART_PUT_CTRL(port, cr);
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}
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static void apbuart_rx_chars(struct uart_port *port)
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{
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unsigned int status, ch, rsr, flag;
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unsigned int max_chars = port->fifosize;
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status = UART_GET_STATUS(port);
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while (UART_RX_DATA(status) && (max_chars--)) {
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ch = UART_GET_CHAR(port);
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flag = TTY_NORMAL;
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port->icount.rx++;
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rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX;
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UART_PUT_STATUS(port, 0);
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if (rsr & UART_STATUS_ERR) {
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if (rsr & UART_STATUS_BR) {
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rsr &= ~(UART_STATUS_FE | UART_STATUS_PE);
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port->icount.brk++;
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if (uart_handle_break(port))
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goto ignore_char;
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} else if (rsr & UART_STATUS_PE) {
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port->icount.parity++;
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} else if (rsr & UART_STATUS_FE) {
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port->icount.frame++;
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}
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if (rsr & UART_STATUS_OE)
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port->icount.overrun++;
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rsr &= port->read_status_mask;
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if (rsr & UART_STATUS_PE)
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flag = TTY_PARITY;
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else if (rsr & UART_STATUS_FE)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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uart_insert_char(port, rsr, UART_STATUS_OE, ch, flag);
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ignore_char:
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status = UART_GET_STATUS(port);
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}
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2024-09-09 08:57:42 +00:00
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spin_unlock(&port->lock);
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tty_flip_buffer_push(&port->state->port);
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spin_lock(&port->lock);
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2024-09-09 08:52:07 +00:00
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}
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static void apbuart_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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int count;
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if (port->x_char) {
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UART_PUT_CHAR(port, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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apbuart_stop_tx(port);
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return;
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}
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/* amba: fill FIFO */
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count = port->fifosize >> 1;
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do {
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UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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apbuart_stop_tx(port);
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}
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static irqreturn_t apbuart_int(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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unsigned int status;
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spin_lock(&port->lock);
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status = UART_GET_STATUS(port);
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if (status & UART_STATUS_DR)
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apbuart_rx_chars(port);
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if (status & UART_STATUS_THE)
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apbuart_tx_chars(port);
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spin_unlock(&port->lock);
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return IRQ_HANDLED;
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}
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static unsigned int apbuart_tx_empty(struct uart_port *port)
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{
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unsigned int status = UART_GET_STATUS(port);
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return status & UART_STATUS_THE ? TIOCSER_TEMT : 0;
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}
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static unsigned int apbuart_get_mctrl(struct uart_port *port)
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{
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/* The GRLIB APBUART handles flow control in hardware */
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return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
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}
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static void apbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* The GRLIB APBUART handles flow control in hardware */
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}
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static void apbuart_break_ctl(struct uart_port *port, int break_state)
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{
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/* We don't support sending break */
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}
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static int apbuart_startup(struct uart_port *port)
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{
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int retval;
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unsigned int cr;
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/* Allocate the IRQ */
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retval = request_irq(port->irq, apbuart_int, 0, "apbuart", port);
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if (retval)
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return retval;
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/* Finally, enable interrupts */
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cr = UART_GET_CTRL(port);
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UART_PUT_CTRL(port,
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cr | UART_CTRL_RE | UART_CTRL_TE |
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UART_CTRL_RI | UART_CTRL_TI);
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return 0;
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}
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static void apbuart_shutdown(struct uart_port *port)
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{
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unsigned int cr;
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/* disable all interrupts, disable the port */
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cr = UART_GET_CTRL(port);
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UART_PUT_CTRL(port,
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cr & ~(UART_CTRL_RE | UART_CTRL_TE |
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UART_CTRL_RI | UART_CTRL_TI));
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/* Free the interrupt */
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free_irq(port->irq, port);
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}
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static void apbuart_set_termios(struct uart_port *port,
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struct ktermios *termios, struct ktermios *old)
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{
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unsigned int cr;
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unsigned long flags;
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unsigned int baud, quot;
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/* Ask the core to calculate the divisor for us. */
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
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if (baud == 0)
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panic("invalid baudrate %i\n", port->uartclk / 16);
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/* uart_get_divisor calc a *16 uart freq, apbuart is *8 */
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quot = (uart_get_divisor(port, baud)) * 2;
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cr = UART_GET_CTRL(port);
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cr &= ~(UART_CTRL_PE | UART_CTRL_PS);
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if (termios->c_cflag & PARENB) {
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cr |= UART_CTRL_PE;
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if ((termios->c_cflag & PARODD))
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cr |= UART_CTRL_PS;
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}
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/* Enable flow control. */
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if (termios->c_cflag & CRTSCTS)
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cr |= UART_CTRL_FL;
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spin_lock_irqsave(&port->lock, flags);
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/* Update the per-port timeout. */
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uart_update_timeout(port, termios->c_cflag, baud);
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port->read_status_mask = UART_STATUS_OE;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
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/* Characters to ignore */
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
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/* Ignore all characters if CREAD is not set. */
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if ((termios->c_cflag & CREAD) == 0)
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port->ignore_status_mask |= UART_DUMMY_RSR_RX;
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/* Set baud rate */
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quot -= 1;
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UART_PUT_SCAL(port, quot);
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UART_PUT_CTRL(port, cr);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *apbuart_type(struct uart_port *port)
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{
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return port->type == PORT_APBUART ? "GRLIB/APBUART" : NULL;
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}
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static void apbuart_release_port(struct uart_port *port)
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{
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release_mem_region(port->mapbase, 0x100);
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}
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static int apbuart_request_port(struct uart_port *port)
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{
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return request_mem_region(port->mapbase, 0x100, "grlib-apbuart")
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!= NULL ? 0 : -EBUSY;
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return 0;
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}
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/* Configure/autoconfigure the port */
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static void apbuart_config_port(struct uart_port *port, int flags)
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{
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if (flags & UART_CONFIG_TYPE) {
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port->type = PORT_APBUART;
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apbuart_request_port(port);
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}
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}
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/* Verify the new serial_struct (for TIOCSSERIAL) */
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static int apbuart_verify_port(struct uart_port *port,
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struct serial_struct *ser)
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{
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int ret = 0;
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if (ser->type != PORT_UNKNOWN && ser->type != PORT_APBUART)
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ret = -EINVAL;
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if (ser->irq < 0 || ser->irq >= NR_IRQS)
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ret = -EINVAL;
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if (ser->baud_base < 9600)
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ret = -EINVAL;
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return ret;
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}
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static struct uart_ops grlib_apbuart_ops = {
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.tx_empty = apbuart_tx_empty,
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.set_mctrl = apbuart_set_mctrl,
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.get_mctrl = apbuart_get_mctrl,
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.stop_tx = apbuart_stop_tx,
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.start_tx = apbuart_start_tx,
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.stop_rx = apbuart_stop_rx,
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.break_ctl = apbuart_break_ctl,
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.startup = apbuart_startup,
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.shutdown = apbuart_shutdown,
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.set_termios = apbuart_set_termios,
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.type = apbuart_type,
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.release_port = apbuart_release_port,
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.request_port = apbuart_request_port,
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.config_port = apbuart_config_port,
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.verify_port = apbuart_verify_port,
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};
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static struct uart_port grlib_apbuart_ports[UART_NR];
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static struct device_node *grlib_apbuart_nodes[UART_NR];
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static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber)
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{
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int ctrl, loop = 0;
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int status;
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int fifosize;
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unsigned long flags;
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ctrl = UART_GET_CTRL(port);
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/*
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* Enable the transceiver and wait for it to be ready to send data.
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* Clear interrupts so that this process will not be externally
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* interrupted in the middle (which can cause the transceiver to
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* drain prematurely).
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*/
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local_irq_save(flags);
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UART_PUT_CTRL(port, ctrl | UART_CTRL_TE);
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while (!UART_TX_READY(UART_GET_STATUS(port)))
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loop++;
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/*
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* Disable the transceiver so data isn't actually sent during the
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* actual test.
|
|
|
|
*/
|
|
|
|
|
|
|
|
UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE));
|
|
|
|
|
|
|
|
fifosize = 1;
|
|
|
|
UART_PUT_CHAR(port, 0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* So long as transmitting a character increments the tranceivier FIFO
|
|
|
|
* length the FIFO must be at least that big. These bytes will
|
|
|
|
* automatically drain off of the FIFO.
|
|
|
|
*/
|
|
|
|
|
|
|
|
status = UART_GET_STATUS(port);
|
|
|
|
while (((status >> 20) & 0x3F) == fifosize) {
|
|
|
|
fifosize++;
|
|
|
|
UART_PUT_CHAR(port, 0);
|
|
|
|
status = UART_GET_STATUS(port);
|
|
|
|
}
|
|
|
|
|
|
|
|
fifosize--;
|
|
|
|
|
|
|
|
UART_PUT_CTRL(port, ctrl);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
|
|
|
if (fifosize == 0)
|
|
|
|
fifosize = 1;
|
|
|
|
|
|
|
|
return fifosize;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void apbuart_flush_fifo(struct uart_port *port)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < port->fifosize; i++)
|
|
|
|
UART_GET_CHAR(port);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* ======================================================================== */
|
|
|
|
/* Console driver, if enabled */
|
|
|
|
/* ======================================================================== */
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE
|
|
|
|
|
|
|
|
static void apbuart_console_putchar(struct uart_port *port, int ch)
|
|
|
|
{
|
|
|
|
unsigned int status;
|
|
|
|
do {
|
|
|
|
status = UART_GET_STATUS(port);
|
|
|
|
} while (!UART_TX_READY(status));
|
|
|
|
UART_PUT_CHAR(port, ch);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
apbuart_console_write(struct console *co, const char *s, unsigned int count)
|
|
|
|
{
|
|
|
|
struct uart_port *port = &grlib_apbuart_ports[co->index];
|
|
|
|
unsigned int status, old_cr, new_cr;
|
|
|
|
|
|
|
|
/* First save the CR then disable the interrupts */
|
|
|
|
old_cr = UART_GET_CTRL(port);
|
|
|
|
new_cr = old_cr & ~(UART_CTRL_RI | UART_CTRL_TI);
|
|
|
|
UART_PUT_CTRL(port, new_cr);
|
|
|
|
|
|
|
|
uart_console_write(port, s, count, apbuart_console_putchar);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Finally, wait for transmitter to become empty
|
|
|
|
* and restore the TCR
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
status = UART_GET_STATUS(port);
|
|
|
|
} while (!UART_TX_READY(status));
|
|
|
|
UART_PUT_CTRL(port, old_cr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __init
|
|
|
|
apbuart_console_get_options(struct uart_port *port, int *baud,
|
|
|
|
int *parity, int *bits)
|
|
|
|
{
|
|
|
|
if (UART_GET_CTRL(port) & (UART_CTRL_RE | UART_CTRL_TE)) {
|
|
|
|
|
|
|
|
unsigned int quot, status;
|
|
|
|
status = UART_GET_STATUS(port);
|
|
|
|
|
|
|
|
*parity = 'n';
|
|
|
|
if (status & UART_CTRL_PE) {
|
|
|
|
if ((status & UART_CTRL_PS) == 0)
|
|
|
|
*parity = 'e';
|
|
|
|
else
|
|
|
|
*parity = 'o';
|
|
|
|
}
|
|
|
|
|
|
|
|
*bits = 8;
|
|
|
|
quot = UART_GET_SCAL(port) / 8;
|
|
|
|
*baud = port->uartclk / (16 * (quot + 1));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init apbuart_console_setup(struct console *co, char *options)
|
|
|
|
{
|
|
|
|
struct uart_port *port;
|
|
|
|
int baud = 38400;
|
|
|
|
int bits = 8;
|
|
|
|
int parity = 'n';
|
|
|
|
int flow = 'n';
|
|
|
|
|
|
|
|
pr_debug("apbuart_console_setup co=%p, co->index=%i, options=%s\n",
|
|
|
|
co, co->index, options);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check whether an invalid uart number has been specified, and
|
|
|
|
* if so, search for the first available port that does have
|
|
|
|
* console support.
|
|
|
|
*/
|
|
|
|
if (co->index >= grlib_apbuart_port_nr)
|
|
|
|
co->index = 0;
|
|
|
|
|
|
|
|
port = &grlib_apbuart_ports[co->index];
|
|
|
|
|
|
|
|
spin_lock_init(&port->lock);
|
|
|
|
|
|
|
|
if (options)
|
|
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
else
|
|
|
|
apbuart_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct uart_driver grlib_apbuart_driver;
|
|
|
|
|
|
|
|
static struct console grlib_apbuart_console = {
|
|
|
|
.name = "ttyS",
|
|
|
|
.write = apbuart_console_write,
|
|
|
|
.device = uart_console_device,
|
|
|
|
.setup = apbuart_console_setup,
|
|
|
|
.flags = CON_PRINTBUFFER,
|
|
|
|
.index = -1,
|
|
|
|
.data = &grlib_apbuart_driver,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
static int grlib_apbuart_configure(void);
|
|
|
|
|
|
|
|
static int __init apbuart_console_init(void)
|
|
|
|
{
|
|
|
|
if (grlib_apbuart_configure())
|
|
|
|
return -ENODEV;
|
|
|
|
register_console(&grlib_apbuart_console);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
console_initcall(apbuart_console_init);
|
|
|
|
|
|
|
|
#define APBUART_CONSOLE (&grlib_apbuart_console)
|
|
|
|
#else
|
|
|
|
#define APBUART_CONSOLE NULL
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static struct uart_driver grlib_apbuart_driver = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.driver_name = "serial",
|
|
|
|
.dev_name = "ttyS",
|
|
|
|
.major = SERIAL_APBUART_MAJOR,
|
|
|
|
.minor = SERIAL_APBUART_MINOR,
|
|
|
|
.nr = UART_NR,
|
|
|
|
.cons = APBUART_CONSOLE,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/* ======================================================================== */
|
|
|
|
/* OF Platform Driver */
|
|
|
|
/* ======================================================================== */
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static int apbuart_probe(struct platform_device *op)
|
2024-09-09 08:52:07 +00:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct uart_port *port = NULL;
|
|
|
|
|
|
|
|
for (i = 0; i < grlib_apbuart_port_nr; i++) {
|
|
|
|
if (op->dev.of_node == grlib_apbuart_nodes[i])
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
port = &grlib_apbuart_ports[i];
|
|
|
|
port->dev = &op->dev;
|
|
|
|
port->irq = op->archdata.irqs[0];
|
|
|
|
|
|
|
|
uart_add_one_port(&grlib_apbuart_driver, (struct uart_port *) port);
|
|
|
|
|
|
|
|
apbuart_flush_fifo((struct uart_port *) port);
|
|
|
|
|
|
|
|
printk(KERN_INFO "grlib-apbuart at 0x%llx, irq %d\n",
|
|
|
|
(unsigned long long) port->mapbase, port->irq);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct of_device_id apbuart_match[] = {
|
|
|
|
{
|
|
|
|
.name = "GAISLER_APBUART",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "01_00c",
|
|
|
|
},
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_driver grlib_apbuart_of_driver = {
|
|
|
|
.probe = apbuart_probe,
|
|
|
|
.driver = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.name = "grlib-apbuart",
|
|
|
|
.of_match_table = apbuart_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
static int __init grlib_apbuart_configure(void)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
int line = 0;
|
|
|
|
|
|
|
|
for_each_matching_node(np, apbuart_match) {
|
|
|
|
const int *ampopts;
|
|
|
|
const u32 *freq_hz;
|
|
|
|
const struct amba_prom_registers *regs;
|
|
|
|
struct uart_port *port;
|
|
|
|
unsigned long addr;
|
|
|
|
|
|
|
|
ampopts = of_get_property(np, "ampopts", NULL);
|
|
|
|
if (ampopts && (*ampopts == 0))
|
|
|
|
continue; /* Ignore if used by another OS instance */
|
|
|
|
regs = of_get_property(np, "reg", NULL);
|
|
|
|
/* Frequency of APB Bus is frequency of UART */
|
|
|
|
freq_hz = of_get_property(np, "freq", NULL);
|
|
|
|
|
|
|
|
if (!regs || !freq_hz || (*freq_hz == 0))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
grlib_apbuart_nodes[line] = np;
|
|
|
|
|
|
|
|
addr = regs->phys_addr;
|
|
|
|
|
|
|
|
port = &grlib_apbuart_ports[line];
|
|
|
|
|
|
|
|
port->mapbase = addr;
|
|
|
|
port->membase = ioremap(addr, sizeof(struct grlib_apbuart_regs_map));
|
|
|
|
port->irq = 0;
|
|
|
|
port->iotype = UPIO_MEM;
|
|
|
|
port->ops = &grlib_apbuart_ops;
|
|
|
|
port->flags = UPF_BOOT_AUTOCONF;
|
|
|
|
port->line = line;
|
|
|
|
port->uartclk = *freq_hz;
|
|
|
|
port->fifosize = apbuart_scan_fifo_size((struct uart_port *) port, line);
|
|
|
|
line++;
|
|
|
|
|
|
|
|
/* We support maximum UART_NR uarts ... */
|
|
|
|
if (line == UART_NR)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
grlib_apbuart_driver.nr = grlib_apbuart_port_nr = line;
|
|
|
|
return line ? 0 : -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init grlib_apbuart_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Find all APBUARTS in device the tree and initialize their ports */
|
|
|
|
ret = grlib_apbuart_configure();
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
printk(KERN_INFO "Serial: GRLIB APBUART driver\n");
|
|
|
|
|
|
|
|
ret = uart_register_driver(&grlib_apbuart_driver);
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
|
|
|
|
__FILE__, ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = platform_driver_register(&grlib_apbuart_of_driver);
|
|
|
|
if (ret) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"%s: platform_driver_register failed (%i)\n",
|
|
|
|
__FILE__, ret);
|
|
|
|
uart_unregister_driver(&grlib_apbuart_driver);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit grlib_apbuart_exit(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < grlib_apbuart_port_nr; i++)
|
|
|
|
uart_remove_one_port(&grlib_apbuart_driver,
|
|
|
|
&grlib_apbuart_ports[i]);
|
|
|
|
|
|
|
|
uart_unregister_driver(&grlib_apbuart_driver);
|
|
|
|
platform_driver_unregister(&grlib_apbuart_of_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(grlib_apbuart_init);
|
|
|
|
module_exit(grlib_apbuart_exit);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Aeroflex Gaisler AB");
|
|
|
|
MODULE_DESCRIPTION("GRLIB APBUART serial driver");
|
|
|
|
MODULE_VERSION("2.1");
|
|
|
|
MODULE_LICENSE("GPL");
|