2024-09-09 08:52:07 +00:00
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/*
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* Copyright © 2006-2011 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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*/
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#include <linux/i2c.h>
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#include <linux/dmi.h>
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#include <drm/drmP.h>
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#include "intel_bios.h"
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#include "psb_drv.h"
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#include "psb_intel_drv.h"
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#include "psb_intel_reg.h"
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#include "power.h"
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#include <linux/pm_runtime.h>
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#include "cdv_device.h"
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/**
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* LVDS I2C backlight control macros
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*/
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#define BRIGHTNESS_MAX_LEVEL 100
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#define BRIGHTNESS_MASK 0xFF
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#define BLC_I2C_TYPE 0x01
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#define BLC_PWM_TYPT 0x02
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#define BLC_POLARITY_NORMAL 0
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#define BLC_POLARITY_INVERSE 1
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#define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
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#define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
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#define PSB_BLC_PWM_PRECISION_FACTOR (10)
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#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
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#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
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struct cdv_intel_lvds_priv {
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/**
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* Saved LVDO output states
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*/
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uint32_t savePP_ON;
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uint32_t savePP_OFF;
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uint32_t saveLVDS;
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uint32_t savePP_CONTROL;
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uint32_t savePP_CYCLE;
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uint32_t savePFIT_CONTROL;
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uint32_t savePFIT_PGM_RATIOS;
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uint32_t saveBLC_PWM_CTL;
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};
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/*
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* Returns the maximum level of the backlight duty cycle field.
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*/
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static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 retval;
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if (gma_power_begin(dev, false)) {
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retval = ((REG_READ(BLC_PWM_CTL) &
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BACKLIGHT_MODULATION_FREQ_MASK) >>
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BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
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gma_power_end(dev);
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} else
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retval = ((dev_priv->regs.saveBLC_PWM_CTL &
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BACKLIGHT_MODULATION_FREQ_MASK) >>
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BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
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return retval;
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}
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#if 0
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/*
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* Set LVDS backlight level by I2C command
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*/
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static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
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unsigned int level)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
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u8 out_buf[2];
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unsigned int blc_i2c_brightness;
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struct i2c_msg msgs[] = {
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{
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.addr = lvds_i2c_bus->slave_addr,
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.flags = 0,
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.len = 2,
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.buf = out_buf,
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}
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};
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blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
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BRIGHTNESS_MASK /
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BRIGHTNESS_MAX_LEVEL);
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if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
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blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
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out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
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out_buf[1] = (u8)blc_i2c_brightness;
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if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
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return 0;
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DRM_ERROR("I2C transfer error\n");
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return -1;
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}
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static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 max_pwm_blc;
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u32 blc_pwm_duty_cycle;
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max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
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/*BLC_PWM_CTL Should be initiated while backlight device init*/
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BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
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blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
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if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
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blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
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blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
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REG_WRITE(BLC_PWM_CTL,
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(max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
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(blc_pwm_duty_cycle));
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return 0;
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}
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/*
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* Set LVDS backlight level either by I2C or PWM
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*/
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void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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if (!dev_priv->lvds_bl) {
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DRM_ERROR("NO LVDS Backlight Info\n");
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return;
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}
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if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
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cdv_lvds_i2c_set_brightness(dev, level);
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else
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cdv_lvds_pwm_set_brightness(dev, level);
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}
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#endif
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/**
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* Sets the backlight level.
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*
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* level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
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*/
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static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 blc_pwm_ctl;
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if (gma_power_begin(dev, false)) {
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blc_pwm_ctl =
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REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
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REG_WRITE(BLC_PWM_CTL,
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(blc_pwm_ctl |
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(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
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gma_power_end(dev);
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} else {
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blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
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~BACKLIGHT_DUTY_CYCLE_MASK;
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dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
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(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
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}
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}
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/**
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* Sets the power state for the panel.
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*/
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static void cdv_intel_lvds_set_power(struct drm_device *dev,
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struct drm_encoder *encoder, bool on)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 pp_status;
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if (!gma_power_begin(dev, true))
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return;
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if (on) {
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REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
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POWER_TARGET_ON);
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do {
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pp_status = REG_READ(PP_STATUS);
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} while ((pp_status & PP_ON) == 0);
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cdv_intel_lvds_set_backlight(dev,
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dev_priv->mode_dev.backlight_duty_cycle);
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} else {
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cdv_intel_lvds_set_backlight(dev, 0);
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REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
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~POWER_TARGET_ON);
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do {
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pp_status = REG_READ(PP_STATUS);
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} while (pp_status & PP_ON);
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}
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gma_power_end(dev);
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}
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static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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if (mode == DRM_MODE_DPMS_ON)
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cdv_intel_lvds_set_power(dev, encoder, true);
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else
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cdv_intel_lvds_set_power(dev, encoder, false);
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/* XXX: We never power down the LVDS pairs. */
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}
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static void cdv_intel_lvds_save(struct drm_connector *connector)
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{
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}
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static void cdv_intel_lvds_restore(struct drm_connector *connector)
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{
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}
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static int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct drm_display_mode *fixed_mode =
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dev_priv->mode_dev.panel_fixed_mode;
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/* just in case */
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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/* just in case */
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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return MODE_NO_INTERLACE;
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if (fixed_mode) {
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if (mode->hdisplay > fixed_mode->hdisplay)
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return MODE_PANEL;
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if (mode->vdisplay > fixed_mode->vdisplay)
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return MODE_PANEL;
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}
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return MODE_OK;
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}
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static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
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2024-09-09 08:57:42 +00:00
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const struct drm_display_mode *mode,
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2024-09-09 08:52:07 +00:00
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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struct drm_encoder *tmp_encoder;
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struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
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/* Should never happen!! */
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list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
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head) {
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if (tmp_encoder != encoder
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&& tmp_encoder->crtc == encoder->crtc) {
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printk(KERN_ERR "Can't enable LVDS and another "
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"encoder on the same pipe\n");
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return false;
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}
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}
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/*
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* If we have timings from the BIOS for the panel, put them in
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* to the adjusted mode. The CRTC will be set up for this mode,
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* with the panel scaling set up to source from the H/VDisplay
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* of the original mode.
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*/
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if (panel_fixed_mode != NULL) {
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adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
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adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
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adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
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adjusted_mode->htotal = panel_fixed_mode->htotal;
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adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
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adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
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adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
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adjusted_mode->vtotal = panel_fixed_mode->vtotal;
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adjusted_mode->clock = panel_fixed_mode->clock;
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drm_mode_set_crtcinfo(adjusted_mode,
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CRTC_INTERLACE_HALVE_V);
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}
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/*
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* XXX: It would be nice to support lower refresh rates on the
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* panels to reduce power consumption, and perhaps match the
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* user's requested refresh rate.
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*/
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return true;
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}
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static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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if (!gma_power_begin(dev, true))
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return;
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mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
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mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
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BACKLIGHT_DUTY_CYCLE_MASK);
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cdv_intel_lvds_set_power(dev, encoder, false);
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gma_power_end(dev);
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}
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static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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if (mode_dev->backlight_duty_cycle == 0)
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mode_dev->backlight_duty_cycle =
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cdv_intel_lvds_get_max_backlight(dev);
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cdv_intel_lvds_set_power(dev, encoder, true);
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}
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static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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|
|
struct drm_display_mode *adjusted_mode)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = encoder->dev;
|
|
|
|
struct drm_psb_private *dev_priv = dev->dev_private;
|
2024-09-09 08:57:42 +00:00
|
|
|
struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
|
2024-09-09 08:52:07 +00:00
|
|
|
u32 pfit_control;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The LVDS pin pair will already have been turned on in the
|
|
|
|
* cdv_intel_crtc_mode_set since it has a large impact on the DPLL
|
|
|
|
* settings.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable automatic panel scaling so that non-native modes fill the
|
|
|
|
* screen. Should be enabled before the pipe is enabled, according to
|
|
|
|
* register description and PRM.
|
|
|
|
*/
|
|
|
|
if (mode->hdisplay != adjusted_mode->hdisplay ||
|
|
|
|
mode->vdisplay != adjusted_mode->vdisplay)
|
|
|
|
pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
|
|
|
|
HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
|
|
|
|
HORIZ_INTERP_BILINEAR);
|
|
|
|
else
|
|
|
|
pfit_control = 0;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
if (dev_priv->lvds_dither)
|
|
|
|
pfit_control |= PANEL_8TO6_DITHER_ENABLE;
|
|
|
|
|
|
|
|
REG_WRITE(PFIT_CONTROL, pfit_control);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Detect the LVDS connection.
|
|
|
|
*
|
|
|
|
* This always returns CONNECTOR_STATUS_CONNECTED.
|
|
|
|
* This connector should only have
|
|
|
|
* been set up if the LVDS was actually connected anyway.
|
|
|
|
*/
|
|
|
|
static enum drm_connector_status cdv_intel_lvds_detect(
|
|
|
|
struct drm_connector *connector, bool force)
|
|
|
|
{
|
|
|
|
return connector_status_connected;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
|
|
|
|
*/
|
|
|
|
static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = connector->dev;
|
|
|
|
struct drm_psb_private *dev_priv = dev->dev_private;
|
2024-09-09 08:57:42 +00:00
|
|
|
struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
|
2024-09-09 08:52:07 +00:00
|
|
|
struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
|
|
|
|
int ret;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* Didn't get an EDID, so
|
|
|
|
* Set wide sync ranges so we get all modes
|
|
|
|
* handed to valid_mode for checking
|
|
|
|
*/
|
|
|
|
connector->display_info.min_vfreq = 0;
|
|
|
|
connector->display_info.max_vfreq = 200;
|
|
|
|
connector->display_info.min_hfreq = 0;
|
|
|
|
connector->display_info.max_hfreq = 200;
|
|
|
|
if (mode_dev->panel_fixed_mode != NULL) {
|
|
|
|
struct drm_display_mode *mode =
|
|
|
|
drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
|
|
|
|
drm_mode_probed_add(connector, mode);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cdv_intel_lvds_destroy - unregister and free LVDS structures
|
|
|
|
* @connector: connector to free
|
|
|
|
*
|
|
|
|
* Unregister the DDC bus for this connector then free the driver private
|
|
|
|
* structure.
|
|
|
|
*/
|
|
|
|
static void cdv_intel_lvds_destroy(struct drm_connector *connector)
|
|
|
|
{
|
2024-09-09 08:57:42 +00:00
|
|
|
struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (gma_encoder->i2c_bus)
|
|
|
|
psb_intel_i2c_destroy(gma_encoder->i2c_bus);
|
|
|
|
drm_connector_unregister(connector);
|
2024-09-09 08:52:07 +00:00
|
|
|
drm_connector_cleanup(connector);
|
|
|
|
kfree(connector);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cdv_intel_lvds_set_property(struct drm_connector *connector,
|
|
|
|
struct drm_property *property,
|
|
|
|
uint64_t value)
|
|
|
|
{
|
|
|
|
struct drm_encoder *encoder = connector->encoder;
|
|
|
|
|
|
|
|
if (!strcmp(property->name, "scaling mode") && encoder) {
|
2024-09-09 08:57:42 +00:00
|
|
|
struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
|
2024-09-09 08:52:07 +00:00
|
|
|
uint64_t curValue;
|
|
|
|
|
|
|
|
if (!crtc)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
switch (value) {
|
|
|
|
case DRM_MODE_SCALE_FULLSCREEN:
|
|
|
|
break;
|
|
|
|
case DRM_MODE_SCALE_NO_SCALE:
|
|
|
|
break;
|
|
|
|
case DRM_MODE_SCALE_ASPECT:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (drm_object_property_get_value(&connector->base,
|
2024-09-09 08:52:07 +00:00
|
|
|
property,
|
|
|
|
&curValue))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
if (curValue == value)
|
|
|
|
return 0;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
if (drm_object_property_set_value(&connector->base,
|
2024-09-09 08:52:07 +00:00
|
|
|
property,
|
|
|
|
value))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
if (crtc->saved_mode.hdisplay != 0 &&
|
|
|
|
crtc->saved_mode.vdisplay != 0) {
|
|
|
|
if (!drm_crtc_helper_set_mode(encoder->crtc,
|
|
|
|
&crtc->saved_mode,
|
|
|
|
encoder->crtc->x,
|
|
|
|
encoder->crtc->y,
|
2024-09-09 08:57:42 +00:00
|
|
|
encoder->crtc->primary->fb))
|
2024-09-09 08:52:07 +00:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
} else if (!strcmp(property->name, "backlight") && encoder) {
|
2024-09-09 08:57:42 +00:00
|
|
|
if (drm_object_property_set_value(&connector->base,
|
2024-09-09 08:52:07 +00:00
|
|
|
property,
|
|
|
|
value))
|
|
|
|
return -1;
|
2024-09-09 08:57:42 +00:00
|
|
|
else
|
|
|
|
gma_backlight_set(encoder->dev, value);
|
2024-09-09 08:52:07 +00:00
|
|
|
} else if (!strcmp(property->name, "DPMS") && encoder) {
|
|
|
|
struct drm_encoder_helper_funcs *helpers =
|
|
|
|
encoder->helper_private;
|
|
|
|
helpers->dpms(encoder, value);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct drm_encoder_helper_funcs
|
|
|
|
cdv_intel_lvds_helper_funcs = {
|
|
|
|
.dpms = cdv_intel_lvds_encoder_dpms,
|
|
|
|
.mode_fixup = cdv_intel_lvds_mode_fixup,
|
|
|
|
.prepare = cdv_intel_lvds_prepare,
|
|
|
|
.mode_set = cdv_intel_lvds_mode_set,
|
|
|
|
.commit = cdv_intel_lvds_commit,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct drm_connector_helper_funcs
|
|
|
|
cdv_intel_lvds_connector_helper_funcs = {
|
|
|
|
.get_modes = cdv_intel_lvds_get_modes,
|
|
|
|
.mode_valid = cdv_intel_lvds_mode_valid,
|
2024-09-09 08:57:42 +00:00
|
|
|
.best_encoder = gma_best_encoder,
|
2024-09-09 08:52:07 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
|
|
|
|
.dpms = drm_helper_connector_dpms,
|
|
|
|
.save = cdv_intel_lvds_save,
|
|
|
|
.restore = cdv_intel_lvds_restore,
|
|
|
|
.detect = cdv_intel_lvds_detect,
|
|
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
|
|
.set_property = cdv_intel_lvds_set_property,
|
|
|
|
.destroy = cdv_intel_lvds_destroy,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
|
|
|
|
{
|
|
|
|
drm_encoder_cleanup(encoder);
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
|
2024-09-09 08:52:07 +00:00
|
|
|
.destroy = cdv_intel_lvds_enc_destroy,
|
|
|
|
};
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
/*
|
|
|
|
* Enumerate the child dev array parsed from VBT to check whether
|
|
|
|
* the LVDS is present.
|
|
|
|
* If it is present, return 1.
|
|
|
|
* If it is not present, return false.
|
|
|
|
* If no child dev is parsed from VBT, it assumes that the LVDS is present.
|
|
|
|
*/
|
|
|
|
static bool lvds_is_present_in_vbt(struct drm_device *dev,
|
|
|
|
u8 *i2c_pin)
|
|
|
|
{
|
|
|
|
struct drm_psb_private *dev_priv = dev->dev_private;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!dev_priv->child_dev_num)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
for (i = 0; i < dev_priv->child_dev_num; i++) {
|
|
|
|
struct child_device_config *child = dev_priv->child_dev + i;
|
|
|
|
|
|
|
|
/* If the device type is not LFP, continue.
|
|
|
|
* We have to check both the new identifiers as well as the
|
|
|
|
* old for compatibility with some BIOSes.
|
|
|
|
*/
|
|
|
|
if (child->device_type != DEVICE_TYPE_INT_LFP &&
|
|
|
|
child->device_type != DEVICE_TYPE_LFP)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (child->i2c_pin)
|
|
|
|
*i2c_pin = child->i2c_pin;
|
|
|
|
|
|
|
|
/* However, we cannot trust the BIOS writers to populate
|
|
|
|
* the VBT correctly. Since LVDS requires additional
|
|
|
|
* information from AIM blocks, a non-zero addin offset is
|
|
|
|
* a good indicator that the LVDS is actually present.
|
|
|
|
*/
|
|
|
|
if (child->addin_offset)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
/* But even then some BIOS writers perform some black magic
|
|
|
|
* and instantiate the device without reference to any
|
|
|
|
* additional data. Trust that if the VBT was written into
|
|
|
|
* the OpRegion then they have validated the LVDS's existence.
|
|
|
|
*/
|
|
|
|
if (dev_priv->opregion.vbt)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
/**
|
|
|
|
* cdv_intel_lvds_init - setup LVDS connectors on this device
|
|
|
|
* @dev: drm device
|
|
|
|
*
|
|
|
|
* Create the connector, register the LVDS DDC bus, and try to figure out what
|
|
|
|
* modes we can display on the LVDS panel (if present).
|
|
|
|
*/
|
|
|
|
void cdv_intel_lvds_init(struct drm_device *dev,
|
|
|
|
struct psb_intel_mode_device *mode_dev)
|
|
|
|
{
|
2024-09-09 08:57:42 +00:00
|
|
|
struct gma_encoder *gma_encoder;
|
|
|
|
struct gma_connector *gma_connector;
|
2024-09-09 08:52:07 +00:00
|
|
|
struct cdv_intel_lvds_priv *lvds_priv;
|
|
|
|
struct drm_connector *connector;
|
|
|
|
struct drm_encoder *encoder;
|
|
|
|
struct drm_display_mode *scan;
|
|
|
|
struct drm_crtc *crtc;
|
|
|
|
struct drm_psb_private *dev_priv = dev->dev_private;
|
|
|
|
u32 lvds;
|
|
|
|
int pipe;
|
2024-09-09 08:57:42 +00:00
|
|
|
u8 pin;
|
|
|
|
|
|
|
|
pin = GMBUS_PORT_PANEL;
|
|
|
|
if (!lvds_is_present_in_vbt(dev, &pin)) {
|
|
|
|
DRM_DEBUG_KMS("LVDS is not present in VBT\n");
|
|
|
|
return;
|
|
|
|
}
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_encoder = kzalloc(sizeof(struct gma_encoder),
|
2024-09-09 08:52:07 +00:00
|
|
|
GFP_KERNEL);
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!gma_encoder)
|
2024-09-09 08:52:07 +00:00
|
|
|
return;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_connector = kzalloc(sizeof(struct gma_connector),
|
2024-09-09 08:52:07 +00:00
|
|
|
GFP_KERNEL);
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!gma_connector)
|
2024-09-09 08:52:07 +00:00
|
|
|
goto failed_connector;
|
|
|
|
|
|
|
|
lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
|
|
|
|
if (!lvds_priv)
|
|
|
|
goto failed_lvds_priv;
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_encoder->dev_priv = lvds_priv;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
connector = &gma_connector->base;
|
|
|
|
encoder = &gma_encoder->base;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
|
|
|
|
drm_connector_init(dev, connector,
|
|
|
|
&cdv_intel_lvds_connector_funcs,
|
|
|
|
DRM_MODE_CONNECTOR_LVDS);
|
|
|
|
|
|
|
|
drm_encoder_init(dev, encoder,
|
|
|
|
&cdv_intel_lvds_enc_funcs,
|
|
|
|
DRM_MODE_ENCODER_LVDS);
|
|
|
|
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_connector_attach_encoder(gma_connector, gma_encoder);
|
|
|
|
gma_encoder->type = INTEL_OUTPUT_LVDS;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
|
|
|
|
drm_connector_helper_add(connector,
|
|
|
|
&cdv_intel_lvds_connector_helper_funcs);
|
|
|
|
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
|
|
|
|
connector->interlace_allowed = false;
|
|
|
|
connector->doublescan_allowed = false;
|
|
|
|
|
|
|
|
/*Attach connector properties*/
|
2024-09-09 08:57:42 +00:00
|
|
|
drm_object_attach_property(&connector->base,
|
2024-09-09 08:52:07 +00:00
|
|
|
dev->mode_config.scaling_mode_property,
|
|
|
|
DRM_MODE_SCALE_FULLSCREEN);
|
2024-09-09 08:57:42 +00:00
|
|
|
drm_object_attach_property(&connector->base,
|
2024-09-09 08:52:07 +00:00
|
|
|
dev_priv->backlight_property,
|
|
|
|
BRIGHTNESS_MAX_LEVEL);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Set up I2C bus
|
|
|
|
* FIXME: distroy i2c_bus when exit
|
|
|
|
*/
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
|
2024-09-09 08:52:07 +00:00
|
|
|
GPIOB,
|
|
|
|
"LVDSBLC_B");
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!gma_encoder->i2c_bus) {
|
2024-09-09 08:52:07 +00:00
|
|
|
dev_printk(KERN_ERR,
|
|
|
|
&dev->pdev->dev, "I2C bus registration failed.\n");
|
|
|
|
goto failed_blc_i2c;
|
|
|
|
}
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_encoder->i2c_bus->slave_addr = 0x2C;
|
|
|
|
dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* LVDS discovery:
|
|
|
|
* 1) check for EDID on DDC
|
|
|
|
* 2) check for VBT data
|
|
|
|
* 3) check to see if LVDS is already on
|
|
|
|
* if none of the above, no panel
|
|
|
|
* 4) make sure lid is open
|
|
|
|
* if closed, act like it's not there for now
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Set up the DDC bus. */
|
2024-09-09 08:57:42 +00:00
|
|
|
gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
|
2024-09-09 08:52:07 +00:00
|
|
|
GPIOC,
|
|
|
|
"LVDSDDC_C");
|
2024-09-09 08:57:42 +00:00
|
|
|
if (!gma_encoder->ddc_bus) {
|
2024-09-09 08:52:07 +00:00
|
|
|
dev_printk(KERN_ERR, &dev->pdev->dev,
|
|
|
|
"DDC bus registration " "failed.\n");
|
|
|
|
goto failed_ddc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Attempt to get the fixed panel mode from DDC. Assume that the
|
|
|
|
* preferred mode is the right one.
|
|
|
|
*/
|
2024-09-09 08:57:42 +00:00
|
|
|
mutex_lock(&dev->mode_config.mutex);
|
2024-09-09 08:52:07 +00:00
|
|
|
psb_intel_ddc_get_modes(connector,
|
2024-09-09 08:57:42 +00:00
|
|
|
&gma_encoder->ddc_bus->adapter);
|
2024-09-09 08:52:07 +00:00
|
|
|
list_for_each_entry(scan, &connector->probed_modes, head) {
|
|
|
|
if (scan->type & DRM_MODE_TYPE_PREFERRED) {
|
|
|
|
mode_dev->panel_fixed_mode =
|
|
|
|
drm_mode_duplicate(dev, scan);
|
|
|
|
goto out; /* FIXME: check for quirks */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Failed to get EDID, what about VBT? do we need this?*/
|
|
|
|
if (dev_priv->lfp_lvds_vbt_mode) {
|
|
|
|
mode_dev->panel_fixed_mode =
|
|
|
|
drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
|
|
|
|
if (mode_dev->panel_fixed_mode) {
|
|
|
|
mode_dev->panel_fixed_mode->type |=
|
|
|
|
DRM_MODE_TYPE_PREFERRED;
|
|
|
|
goto out; /* FIXME: check for quirks */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* If we didn't get EDID, try checking if the panel is already turned
|
|
|
|
* on. If so, assume that whatever is currently programmed is the
|
|
|
|
* correct mode.
|
|
|
|
*/
|
|
|
|
lvds = REG_READ(LVDS);
|
|
|
|
pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
|
|
|
|
crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
|
|
|
|
|
|
|
|
if (crtc && (lvds & LVDS_PORT_EN)) {
|
|
|
|
mode_dev->panel_fixed_mode =
|
|
|
|
cdv_intel_crtc_mode_get(dev, crtc);
|
|
|
|
if (mode_dev->panel_fixed_mode) {
|
|
|
|
mode_dev->panel_fixed_mode->type |=
|
|
|
|
DRM_MODE_TYPE_PREFERRED;
|
|
|
|
goto out; /* FIXME: check for quirks */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If we still don't have a mode after all that, give up. */
|
|
|
|
if (!mode_dev->panel_fixed_mode) {
|
|
|
|
DRM_DEBUG
|
|
|
|
("Found no modes on the lvds, ignoring the LVDS\n");
|
|
|
|
goto failed_find;
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
/* setup PWM */
|
|
|
|
{
|
|
|
|
u32 pwm;
|
|
|
|
|
|
|
|
pwm = REG_READ(BLC_PWM_CTL2);
|
|
|
|
if (pipe == 1)
|
|
|
|
pwm |= PWM_PIPE_B;
|
|
|
|
else
|
|
|
|
pwm &= ~PWM_PIPE_B;
|
|
|
|
pwm |= PWM_ENABLE;
|
|
|
|
REG_WRITE(BLC_PWM_CTL2, pwm);
|
|
|
|
}
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
out:
|
2024-09-09 08:57:42 +00:00
|
|
|
mutex_unlock(&dev->mode_config.mutex);
|
|
|
|
drm_connector_register(connector);
|
2024-09-09 08:52:07 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
failed_find:
|
2024-09-09 08:57:42 +00:00
|
|
|
mutex_unlock(&dev->mode_config.mutex);
|
2024-09-09 08:52:07 +00:00
|
|
|
printk(KERN_ERR "Failed find\n");
|
2024-09-09 08:57:42 +00:00
|
|
|
if (gma_encoder->ddc_bus)
|
|
|
|
psb_intel_i2c_destroy(gma_encoder->ddc_bus);
|
2024-09-09 08:52:07 +00:00
|
|
|
failed_ddc:
|
|
|
|
printk(KERN_ERR "Failed DDC\n");
|
2024-09-09 08:57:42 +00:00
|
|
|
if (gma_encoder->i2c_bus)
|
|
|
|
psb_intel_i2c_destroy(gma_encoder->i2c_bus);
|
2024-09-09 08:52:07 +00:00
|
|
|
failed_blc_i2c:
|
|
|
|
printk(KERN_ERR "Failed BLC\n");
|
|
|
|
drm_encoder_cleanup(encoder);
|
|
|
|
drm_connector_cleanup(connector);
|
|
|
|
kfree(lvds_priv);
|
|
|
|
failed_lvds_priv:
|
2024-09-09 08:57:42 +00:00
|
|
|
kfree(gma_connector);
|
2024-09-09 08:52:07 +00:00
|
|
|
failed_connector:
|
2024-09-09 08:57:42 +00:00
|
|
|
kfree(gma_encoder);
|
2024-09-09 08:52:07 +00:00
|
|
|
}
|