2024-09-09 08:52:07 +00:00
|
|
|
menuconfig CORESIGHT
|
|
|
|
bool "CoreSight Tracing Support"
|
|
|
|
help
|
|
|
|
CoreSight components are compliant with the ARM CoreSight
|
|
|
|
architecture specification and can be connected in various
|
|
|
|
topologies to suite a particular SoCs tracing needs. These trace
|
|
|
|
components can generally be classified as sources, links and
|
|
|
|
sinks. Trace data produced by one or more sources flows through
|
|
|
|
the intermediate links connecting the source to the currently
|
|
|
|
selected sink.
|
|
|
|
|
|
|
|
This framework provides an interface for the CoreSight debug and
|
|
|
|
trace drivers to register themselves with. It's intended to build
|
|
|
|
up a topological view of the CoreSight components and configure
|
|
|
|
the right series of components on user input via sysfs. It also
|
|
|
|
provides status information to user space applications through
|
|
|
|
sysfs interface.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid potential power, performance and
|
|
|
|
memory penalty.
|
|
|
|
|
|
|
|
if CORESIGHT
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_EVENT
|
|
|
|
tristate "CoreSight Event driver"
|
|
|
|
help
|
|
|
|
This driver provides support for registering with various events
|
|
|
|
and performing CoreSight actions like aborting trace on their
|
|
|
|
occurrence. These events can be controlled by using module
|
|
|
|
parameters.
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
config HAVE_CORESIGHT_SINK
|
|
|
|
bool
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_FUSE
|
|
|
|
bool "CoreSight Fuse driver"
|
|
|
|
help
|
|
|
|
This driver provides support for CoreSight Fuse state checks that
|
|
|
|
other CoreSight drivers can query to determine existence of
|
|
|
|
Hardware functionality they support. Drivers can then take necessary
|
|
|
|
actions like failing the probe if the Hardware they manage is
|
|
|
|
functionally disabled.
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
config CORESIGHT_CTI
|
|
|
|
bool "CoreSight Cross Trigger Interface driver"
|
|
|
|
help
|
|
|
|
This driver provides support for Cross Trigger Interface that is
|
|
|
|
used to input or output i.e. pass cross trigger events from one
|
|
|
|
hardware component to another. It can also be used to pass
|
|
|
|
software generated events.
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_CTI_SAVE_DISABLE
|
|
|
|
bool "Turn off CTI save and restore"
|
|
|
|
help
|
|
|
|
Turns off CoreSight CTI save and restore support for cpu CTIs. This
|
|
|
|
avoids voting for the clocks during probe as well as the associated
|
|
|
|
save and restore latency at the cost of breaking cpu CTI support on
|
|
|
|
targets where cpu CTIs have to be preserved across power collapse.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid breaking cpu CTI support.
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
config CORESIGHT_CSR
|
|
|
|
bool "CoreSight Slave Register driver"
|
|
|
|
help
|
|
|
|
This driver provides support for CoreSight Slave Register block
|
|
|
|
that hosts miscellaneous configuration registers.
|
|
|
|
|
|
|
|
config CORESIGHT_TMC
|
|
|
|
bool "CoreSight Trace Memory Controller driver"
|
|
|
|
select CORESIGHT_CSR
|
|
|
|
select HAVE_CORESIGHT_SINK
|
|
|
|
help
|
|
|
|
This driver provides support for Trace Memory Controller which
|
|
|
|
can be configured as either an ETB (Embedded Trace Buffer),
|
|
|
|
ETR (Embedded Trace Router) or ETF (Embedded Trace Fifo). It acts
|
|
|
|
as sink when configured as ETB, ETR or ETF in circular buffer mode
|
|
|
|
whereas it is a link when configured as ETF in hardware fifo mode.
|
|
|
|
|
|
|
|
ETB collects trace data in a circular buffer whereas ETR can be
|
|
|
|
used to route trace data to memory allocated in RAM. ETF in
|
|
|
|
circular buffer mode is like an ETB whereas in hardware fifo mode
|
|
|
|
it is a fifo link.
|
|
|
|
|
|
|
|
config CORESIGHT_TPIU
|
|
|
|
bool "CoreSight Trace Port Interface Unit driver"
|
|
|
|
select HAVE_CORESIGHT_SINK
|
|
|
|
help
|
|
|
|
This driver provides support for Trace Port Interface Unit which
|
|
|
|
acts as a conduit for offchip trace collection.
|
|
|
|
|
|
|
|
if HAVE_CORESIGHT_SINK
|
|
|
|
|
|
|
|
config CORESIGHT_FUNNEL
|
|
|
|
bool "CoreSight Funnel driver"
|
|
|
|
help
|
|
|
|
This driver provides support for Funnel which is a link that
|
|
|
|
typically has multiple input ports and a single output port. Input
|
|
|
|
trace data streams from the input ports are interleaved into a
|
|
|
|
single output trace data stream coming out of the output port.
|
|
|
|
|
|
|
|
config CORESIGHT_REPLICATOR
|
|
|
|
bool "CoreSight Replicator driver"
|
|
|
|
help
|
|
|
|
This driver provides support for Replicator that typically has
|
|
|
|
a single input port and two output ports. Single trace data
|
|
|
|
stream on the input port is replicated to produce two identical
|
|
|
|
trace data output streams coming out of the two output ports.
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_TPDA
|
|
|
|
bool "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
|
|
|
|
help
|
|
|
|
This driver provides support for configuring aggregator. This is
|
|
|
|
primarily useful for pulling the data sets from one or more
|
|
|
|
attached monitors and pushing the resultant data out. Multiple
|
|
|
|
monitors are connected on different input ports of TPDA.
|
|
|
|
|
|
|
|
config CORESIGHT_TPDM
|
|
|
|
bool "CoreSight Trace, Profiling & Diagnostics Monitor driver"
|
|
|
|
help
|
|
|
|
This driver provides support for configuring monitor. Monitors are
|
|
|
|
primarily responsible for data set collection and support the
|
|
|
|
ability to collect any permutation of data set types. Monitors are
|
|
|
|
also responsible for interaction with system cross triggering.
|
|
|
|
|
|
|
|
config CORESIGHT_TPDM_DEFAULT_ENABLE
|
|
|
|
bool "Turn on TPDM tracing by default"
|
|
|
|
depends on CORESIGHT_TPDM
|
|
|
|
help
|
|
|
|
Turns on CoreSight TPDM tracing for different data set types by
|
|
|
|
default. Otherwise, tracing is disabled by default but can be
|
|
|
|
enabled via sysfs.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid potential power and performance
|
|
|
|
penalty.
|
|
|
|
|
|
|
|
config CORESIGHT_DBGUI
|
|
|
|
bool "CoreSight DebugUI driver"
|
|
|
|
help
|
|
|
|
This driver provides support for DebugUI that helps to capture
|
|
|
|
the value at a specified address. It allows configuring DebugUI
|
|
|
|
to select specified address and trigger mode based on user
|
|
|
|
input.
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
config CORESIGHT_STM
|
|
|
|
bool "CoreSight System Trace Macrocell driver"
|
|
|
|
help
|
|
|
|
This driver provides support for hardware assisted software
|
|
|
|
instrumentation based tracing. This is primarily useful for
|
|
|
|
logging useful software events or data.
|
|
|
|
|
|
|
|
config CORESIGHT_STM_DEFAULT_ENABLE
|
|
|
|
bool "Turn on STM tracing by default"
|
|
|
|
depends on CORESIGHT_STM
|
|
|
|
help
|
|
|
|
Turns on CoreSight STM tracing (hardware assisted software
|
|
|
|
instrumentation based tracing) by default. Otherwise, tracing is
|
|
|
|
disabled by default but can be enabled via sysfs.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid potential power and performance
|
|
|
|
penalty.
|
|
|
|
|
|
|
|
config CORESIGHT_HWEVENT
|
|
|
|
bool "CoreSight Hardware Event driver"
|
|
|
|
depends on CORESIGHT_STM
|
|
|
|
select CORESIGHT_CSR
|
|
|
|
help
|
|
|
|
This driver provides support for monitoring and tracing CoreSight
|
|
|
|
Hardware Event across STM interface. It configures Coresight
|
|
|
|
Hardware Event mux control registers to select hardware events
|
|
|
|
based on user input.
|
|
|
|
|
|
|
|
config CORESIGHT_ETM
|
|
|
|
bool "CoreSight Embedded Trace Macrocell driver"
|
|
|
|
help
|
|
|
|
This driver provides support for processor tracing which allows
|
|
|
|
tracing the instructions that the processor is executing. This is
|
|
|
|
primarily useful for instruction level tracing.
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_ETM_DEFAULT_RESET
|
|
|
|
bool "Reset ETM by default"
|
|
|
|
depends on CORESIGHT_ETM
|
|
|
|
help
|
|
|
|
Reset CoreSight ETM tracing (processor tracing) parameters by
|
|
|
|
default. This configures ETM parameters to reset values instead
|
|
|
|
of preconfigured values on bootup. Otherwise, ETM parameters take
|
|
|
|
preconfigured values by default but these can be reset via sysfs.
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
config CORESIGHT_ETM_DEFAULT_ENABLE
|
|
|
|
bool "Turn on ETM tracing by default"
|
|
|
|
depends on CORESIGHT_ETM
|
|
|
|
help
|
|
|
|
Turns on CoreSight ETM tracing (processor tracing) by default.
|
|
|
|
Otherwise, tracing is disabled by default but can be enabled via
|
|
|
|
sysfs.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid potential power and performance
|
|
|
|
penalty.
|
|
|
|
|
|
|
|
config CORESIGHT_ETM_PCSAVE_DEFAULT_ENABLE
|
|
|
|
bool "Turn on PC saving by default"
|
|
|
|
depends on CORESIGHT_ETM
|
|
|
|
help
|
|
|
|
Turns on program counter saving on reset by default. Otherwise,
|
|
|
|
PC saving is disabled by default but can be enabled via sysfs.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid potential power penalty.
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_ETMV4
|
|
|
|
bool "CoreSight Embedded Trace Macrocell v4 driver"
|
|
|
|
help
|
|
|
|
This driver provides support for processor tracing which allows
|
|
|
|
tracing the instructions that the processor is executing on ARMv8
|
|
|
|
architecture. This is primarily useful for instruction level
|
|
|
|
tracing.
|
|
|
|
|
|
|
|
config CORESIGHT_ETMV4_DEFAULT_RESET
|
|
|
|
bool "Reset ETMV4 by default"
|
|
|
|
depends on CORESIGHT_ETMV4
|
|
|
|
help
|
|
|
|
Reset CoreSight ETMV4 tracing (processor tracing) parameters by
|
|
|
|
default. This configures ETMV4 parameters to reset values instead
|
|
|
|
of preconfigured values on bootup. Otherwise, ETMV4 parameters take
|
|
|
|
preconfigured values by default but these can be reset via sysfs.
|
|
|
|
|
|
|
|
config CORESIGHT_ETMV4_DEFAULT_ENABLE
|
|
|
|
bool "Turn on ETMV4 tracing by default"
|
|
|
|
depends on CORESIGHT_ETMV4
|
|
|
|
help
|
|
|
|
Turns on CoreSight ETMV4 tracing (processor tracing) by default.
|
|
|
|
Otherwise, tracing is disabled by default but can be enabled via
|
|
|
|
sysfs.
|
|
|
|
|
|
|
|
If unsure, say 'N' here to avoid potential power and performance
|
|
|
|
penalty.
|
|
|
|
|
|
|
|
config CORESIGHT_REMOTE_ETM
|
|
|
|
bool "Remote processor ETM trace support"
|
|
|
|
depends on MSM_QMI_INTERFACE
|
|
|
|
help
|
|
|
|
Enables support for ETM trace collection on remote processor using
|
|
|
|
CoreSight framework. Enabling this will allow turning on ETM
|
|
|
|
tracing on remote processor via sysfs by configuring the required
|
|
|
|
CoreSight components.
|
|
|
|
|
|
|
|
config CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE
|
|
|
|
int "default enable bits for Remote processor ETM"
|
|
|
|
depends on CORESIGHT_REMOTE_ETM
|
|
|
|
default 0
|
|
|
|
help
|
|
|
|
Support for enabling separated Remote processor ETM tracing. Depends
|
|
|
|
on if instance id bit is set.
|
|
|
|
|
2024-09-09 08:52:07 +00:00
|
|
|
endif
|
|
|
|
|
2024-09-09 08:57:42 +00:00
|
|
|
config CORESIGHT_QPDI
|
|
|
|
bool "CoreSight PMIC debug interface support"
|
2024-09-09 08:52:07 +00:00
|
|
|
help
|
2024-09-09 08:57:42 +00:00
|
|
|
This driver provides support for controlling the PMIC debug interface
|
|
|
|
feature. When enabled via sysfs it allows disagnostic access to the
|
|
|
|
PMIC. Similarly this debug feature can be disabled via sysfs which
|
|
|
|
prevents debug dongle detection.
|
2024-09-09 08:52:07 +00:00
|
|
|
|
|
|
|
endif
|