2024-09-09 08:52:07 +00:00
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/* Included from asm/pgtable-*.h only ! */
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/*
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* Some bits are only used on some cpu families... Make sure that all
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* the undefined gets a sensible default
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*/
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#ifndef _PAGE_HASHPTE
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#define _PAGE_HASHPTE 0
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#endif
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#ifndef _PAGE_SHARED
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#define _PAGE_SHARED 0
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#endif
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#ifndef _PAGE_HWWRITE
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#define _PAGE_HWWRITE 0
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#endif
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#ifndef _PAGE_EXEC
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#define _PAGE_EXEC 0
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#endif
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#ifndef _PAGE_ENDIAN
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#define _PAGE_ENDIAN 0
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#endif
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#ifndef _PAGE_COHERENT
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#define _PAGE_COHERENT 0
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#endif
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#ifndef _PAGE_WRITETHRU
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#define _PAGE_WRITETHRU 0
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#endif
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#ifndef _PAGE_4K_PFN
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#define _PAGE_4K_PFN 0
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#endif
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#ifndef _PAGE_SAO
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#define _PAGE_SAO 0
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#endif
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#ifndef _PAGE_PSIZE
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#define _PAGE_PSIZE 0
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#endif
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#ifndef _PMD_PRESENT_MASK
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#define _PMD_PRESENT_MASK _PMD_PRESENT
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#endif
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#ifndef _PMD_SIZE
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#define _PMD_SIZE 0
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#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
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#endif
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#ifndef _PAGE_KERNEL_RO
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#define _PAGE_KERNEL_RO 0
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#endif
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#ifndef _PAGE_KERNEL_ROX
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#define _PAGE_KERNEL_ROX (_PAGE_EXEC)
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#endif
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#ifndef _PAGE_KERNEL_RW
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#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
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#endif
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#ifndef _PAGE_KERNEL_RWX
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#define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
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#endif
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#ifndef _PAGE_HPTEFLAGS
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#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
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#endif
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#ifndef _PTE_NONE_MASK
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#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
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#endif
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/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
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* kernel without large page PMD support
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*/
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#ifndef __ASSEMBLY__
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extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
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#endif /* __ASSEMBLY__ */
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/* Location of the PFN in the PTE. Most 32-bit platforms use the same
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* as _PAGE_SHIFT here (ie, naturally aligned).
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* Platform who don't just pre-define the value so we don't override it here
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*/
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#ifndef PTE_RPN_SHIFT
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#define PTE_RPN_SHIFT (PAGE_SHIFT)
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#endif
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/* The mask convered by the RPN must be a ULL on 32-bit platforms with
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* 64-bit PTEs
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*/
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#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
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#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
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#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
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#else
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#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
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#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
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#endif
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/* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL)
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
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_PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
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2024-09-09 08:57:42 +00:00
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#ifdef CONFIG_NUMA_BALANCING
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/* Mask of bits that distinguish present and numa ptes */
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#define _PAGE_NUMA_MASK (_PAGE_NUMA|_PAGE_PRESENT)
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#endif
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2024-09-09 08:52:07 +00:00
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* pages. We always set _PAGE_COHERENT when SMP is enabled or
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* the processor might need it for DMA coherency.
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*/
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
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#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
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#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
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#else
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#define _PAGE_BASE (_PAGE_BASE_NC)
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#endif
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/* Permission masks used to generate the __P and __S table,
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*
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* Note:__pgprot is defined in arch/powerpc/include/asm/page.h
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*
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* Write permissions imply read permissions for now (we could make write-only
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* pages on BookE but we don't bother for now). Execute permission control is
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* possible on platforms that define _PAGE_EXEC
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*
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* Note due to the way vm flags are laid out, the bits are XWR
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*/
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#define PAGE_NONE __pgprot(_PAGE_BASE)
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#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
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#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
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#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
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#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY_X
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#define __P101 PAGE_READONLY_X
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#define __P110 PAGE_COPY_X
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#define __P111 PAGE_COPY_X
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY_X
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#define __S101 PAGE_READONLY_X
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#define __S110 PAGE_SHARED_X
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#define __S111 PAGE_SHARED_X
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/* Permission masks used for kernel mappings */
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
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#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NO_CACHE)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NO_CACHE | _PAGE_GUARDED)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
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/* Protection used for kernel text. We want the debuggers to be able to
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* set breakpoints anywhere, so don't write protect the kernel text
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* on platforms where such control is possible.
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*/
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#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
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defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
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#else
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
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#endif
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/* Make modules code happy. We don't set RO yet */
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#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
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/*
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* Don't just check for any non zero bits in __PAGE_USER, since for book3e
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* and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
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* _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
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*/
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#define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER)
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/* Advertise special mapping type for AGP */
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#define PAGE_AGP (PAGE_KERNEL_NC)
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#define HAVE_PAGE_AGP
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/* Advertise support for _PAGE_SPECIAL */
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#define __HAVE_ARCH_PTE_SPECIAL
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