406 lines
13 KiB
C
406 lines
13 KiB
C
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/*
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* Definition of platform feature hooks for PowerMacs
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1998 Paul Mackerras &
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* Ben. Herrenschmidt.
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*
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*
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* Note: I removed media-bay details from the feature stuff, I believe it's
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* not worth it, the media-bay driver can directly use the mac-io
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* ASIC registers.
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*
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* Implementation note: Currently, none of these functions will block.
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* However, they may internally protect themselves with a spinlock
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* for way too long. Be prepared for at least some of these to block
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* in the future.
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*
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* Unless specifically defined, the result code is assumed to be an
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* error when negative, 0 is the default success result. Some functions
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* may return additional positive result values.
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*
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* To keep implementation simple, all feature calls are assumed to have
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* the prototype parameters (struct device_node* node, int value).
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* When either is not used, pass 0.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_POWERPC_PMAC_FEATURE_H
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#define __ASM_POWERPC_PMAC_FEATURE_H
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#include <asm/macio.h>
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#include <asm/machdep.h>
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/*
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* Known Mac motherboard models
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*
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* Please, report any error here to benh@kernel.crashing.org, thanks !
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*
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* Note that I don't fully maintain this list for Core99 & MacRISC2
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* and I'm considering removing all NewWorld entries from it and
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* entirely rely on the model string.
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*/
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/* PowerSurge are the first generation of PCI Pmacs. This include
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* all of the Grand-Central based machines. We currently don't
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* differenciate most of them.
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*/
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#define PMAC_TYPE_PSURGE 0x10 /* PowerSurge */
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#define PMAC_TYPE_ANS 0x11 /* Apple Network Server */
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/* Here is the infamous serie of OHare based machines
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*/
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#define PMAC_TYPE_COMET 0x20 /* Believed to be PowerBook 2400 */
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#define PMAC_TYPE_HOOPER 0x21 /* Believed to be PowerBook 3400 */
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#define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */
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#define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */
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#define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */
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#define PMAC_TYPE_UNKNOWN_OHARE 0x2f /* Unknown, but OHare based */
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/* Here are the Heathrow based machines
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* FIXME: Differenciate wallstreet,mainstreet,wallstreetII
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*/
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#define PMAC_TYPE_GOSSAMER 0x30 /* Gossamer motherboard */
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#define PMAC_TYPE_SILK 0x31 /* Desktop PowerMac G3 */
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#define PMAC_TYPE_WALLSTREET 0x32 /* Wallstreet/Mainstreet PowerBook*/
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#define PMAC_TYPE_UNKNOWN_HEATHROW 0x3f /* Unknown but heathrow based */
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/* Here are newworld machines based on Paddington (heathrow derivative)
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*/
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#define PMAC_TYPE_101_PBOOK 0x40 /* 101 PowerBook (aka Lombard) */
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#define PMAC_TYPE_ORIG_IMAC 0x41 /* First generation iMac */
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#define PMAC_TYPE_YOSEMITE 0x42 /* B&W G3 */
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#define PMAC_TYPE_YIKES 0x43 /* Yikes G4 (PCI graphics) */
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#define PMAC_TYPE_UNKNOWN_PADDINGTON 0x4f /* Unknown but paddington based */
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/* Core99 machines based on UniNorth 1.0 and 1.5
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*
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* Note: A single entry here may cover several actual models according
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* to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most
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* FireWire based iMacs, etc...). Those machines are too similar to be
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* distinguished here, when they need to be differencied, use the
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* device-tree "model" or "compatible" property.
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*/
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#define PMAC_TYPE_ORIG_IBOOK 0x40 /* First iBook model (no firewire) */
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#define PMAC_TYPE_SAWTOOTH 0x41 /* Desktop G4s */
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#define PMAC_TYPE_FW_IMAC 0x42 /* FireWire iMacs (except Pangea based) */
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#define PMAC_TYPE_FW_IBOOK 0x43 /* FireWire iBooks (except iBook2) */
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#define PMAC_TYPE_CUBE 0x44 /* Cube PowerMac */
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#define PMAC_TYPE_QUICKSILVER 0x45 /* QuickSilver G4s */
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#define PMAC_TYPE_PISMO 0x46 /* Pismo PowerBook */
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#define PMAC_TYPE_TITANIUM 0x47 /* Titanium PowerBook */
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#define PMAC_TYPE_TITANIUM2 0x48 /* Titanium II PowerBook (no L3, M6) */
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#define PMAC_TYPE_TITANIUM3 0x49 /* Titanium III PowerBook (with L3 & M7) */
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#define PMAC_TYPE_TITANIUM4 0x50 /* Titanium IV PowerBook (with L3 & M9) */
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#define PMAC_TYPE_EMAC 0x50 /* eMac */
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#define PMAC_TYPE_UNKNOWN_CORE99 0x5f
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/* MacRisc2 with UniNorth 2.0 */
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#define PMAC_TYPE_RACKMAC 0x80 /* XServe */
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#define PMAC_TYPE_WINDTUNNEL 0x81
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/* MacRISC2 machines based on the Pangea chipset
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*/
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#define PMAC_TYPE_PANGEA_IMAC 0x100 /* Flower Power iMac */
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#define PMAC_TYPE_IBOOK2 0x101 /* iBook2 (polycarbonate) */
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#define PMAC_TYPE_FLAT_PANEL_IMAC 0x102 /* Flat panel iMac */
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#define PMAC_TYPE_UNKNOWN_PANGEA 0x10f
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/* MacRISC2 machines based on the Intrepid chipset
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*/
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#define PMAC_TYPE_UNKNOWN_INTREPID 0x11f /* Generic */
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/* MacRISC4 / G5 machines. We don't have per-machine selection here anymore,
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* but rather machine families
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*/
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#define PMAC_TYPE_POWERMAC_G5 0x150 /* U3 & U3H based */
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#define PMAC_TYPE_POWERMAC_G5_U3L 0x151 /* U3L based desktop */
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#define PMAC_TYPE_IMAC_G5 0x152 /* iMac G5 */
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#define PMAC_TYPE_XSERVE_G5 0x153 /* Xserve G5 */
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#define PMAC_TYPE_UNKNOWN_K2 0x19f /* Any other K2 based */
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#define PMAC_TYPE_UNKNOWN_SHASTA 0x19e /* Any other Shasta based */
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/*
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* Motherboard flags
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*/
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#define PMAC_MB_CAN_SLEEP 0x00000001
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#define PMAC_MB_HAS_FW_POWER 0x00000002
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#define PMAC_MB_OLD_CORE99 0x00000004
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#define PMAC_MB_MOBILE 0x00000008
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#define PMAC_MB_MAY_SLEEP 0x00000010
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/*
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* Feature calls supported on pmac
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*
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*/
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/*
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* Use this inline wrapper
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*/
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struct device_node;
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static inline long pmac_call_feature(int selector, struct device_node* node,
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long param, long value)
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{
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if (!ppc_md.feature_call || !machine_is(powermac))
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return -ENODEV;
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return ppc_md.feature_call(selector, node, param, value);
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}
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/* PMAC_FTR_SERIAL_ENABLE (struct device_node* node, int param, int value)
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* enable/disable an SCC side. Pass the node corresponding to the
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* channel side as a parameter.
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* param is the type of port
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* if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled
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* for use by xmon.
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*/
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#define PMAC_FTR_SCC_ENABLE PMAC_FTR_DEF(0)
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#define PMAC_SCC_ASYNC 0
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#define PMAC_SCC_IRDA 1
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#define PMAC_SCC_I2S1 2
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#define PMAC_SCC_FLAG_XMON 0x00001000
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/* PMAC_FTR_MODEM_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the internal modem.
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*/
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#define PMAC_FTR_MODEM_ENABLE PMAC_FTR_DEF(1)
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/* PMAC_FTR_SWIM3_ENABLE (struct device_node* node, 0,int value)
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* enable/disable the swim3 (floppy) cell of a mac-io ASIC
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*/
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#define PMAC_FTR_SWIM3_ENABLE PMAC_FTR_DEF(2)
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/* PMAC_FTR_MESH_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the mesh (scsi) cell of a mac-io ASIC
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*/
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#define PMAC_FTR_MESH_ENABLE PMAC_FTR_DEF(3)
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/* PMAC_FTR_IDE_ENABLE (struct device_node* node, int busID, int value)
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* enable/disable an IDE port of a mac-io ASIC
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* pass the busID parameter
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*/
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#define PMAC_FTR_IDE_ENABLE PMAC_FTR_DEF(4)
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/* PMAC_FTR_IDE_RESET (struct device_node* node, int busID, int value)
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* assert(1)/release(0) an IDE reset line (mac-io IDE only)
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*/
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#define PMAC_FTR_IDE_RESET PMAC_FTR_DEF(5)
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/* PMAC_FTR_BMAC_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive
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* it's reset line
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*/
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#define PMAC_FTR_BMAC_ENABLE PMAC_FTR_DEF(6)
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/* PMAC_FTR_GMAC_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the gmac (ethernet) cell of an uninorth ASIC. This
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* control the cell's clock.
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*/
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#define PMAC_FTR_GMAC_ENABLE PMAC_FTR_DEF(7)
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/* PMAC_FTR_GMAC_PHY_RESET (struct device_node* node, 0, 0)
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* Perform a HW reset of the PHY connected to a gmac controller.
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* Pass the gmac device node, not the PHY node.
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*/
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#define PMAC_FTR_GMAC_PHY_RESET PMAC_FTR_DEF(8)
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/* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the sound chip, whatever it is and provided it can
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* acually be controlled
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*/
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#define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9)
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/* -- add various tweaks related to sound routing -- */
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/* PMAC_FTR_AIRPORT_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the airport card
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*/
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#define PMAC_FTR_AIRPORT_ENABLE PMAC_FTR_DEF(10)
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/* PMAC_FTR_RESET_CPU (NULL, int cpu_nr, 0)
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* toggle the reset line of a CPU on an uninorth-based SMP machine
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*/
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#define PMAC_FTR_RESET_CPU PMAC_FTR_DEF(11)
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/* PMAC_FTR_USB_ENABLE (struct device_node* node, 0, int value)
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* enable/disable an USB cell, along with the power of the USB "pad"
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* on keylargo based machines
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*/
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#define PMAC_FTR_USB_ENABLE PMAC_FTR_DEF(12)
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/* PMAC_FTR_1394_ENABLE (struct device_node* node, 0, int value)
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* enable/disable the firewire cell of an uninorth ASIC.
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*/
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#define PMAC_FTR_1394_ENABLE PMAC_FTR_DEF(13)
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/* PMAC_FTR_1394_CABLE_POWER (struct device_node* node, 0, int value)
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* enable/disable the firewire cable power supply of the uninorth
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* firewire cell
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*/
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#define PMAC_FTR_1394_CABLE_POWER PMAC_FTR_DEF(14)
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/* PMAC_FTR_SLEEP_STATE (struct device_node* node, 0, int value)
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* set the sleep state of the motherboard.
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*
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* Pass -1 as value to query for sleep capability
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* Pass 1 to set IOs to sleep
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* Pass 0 to set IOs to wake
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*/
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#define PMAC_FTR_SLEEP_STATE PMAC_FTR_DEF(15)
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/* PMAC_FTR_GET_MB_INFO (NULL, selector, 0)
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*
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* returns some motherboard infos.
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* selector: 0 - model id
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* 1 - model flags (capabilities)
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* 2 - model name (cast to const char *)
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*/
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#define PMAC_FTR_GET_MB_INFO PMAC_FTR_DEF(16)
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#define PMAC_MB_INFO_MODEL 0
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#define PMAC_MB_INFO_FLAGS 1
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#define PMAC_MB_INFO_NAME 2
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/* PMAC_FTR_READ_GPIO (NULL, int index, 0)
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*
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* read a GPIO from a mac-io controller of type KeyLargo or Pangea.
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* the value returned is a byte (positive), or a negative error code
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*/
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#define PMAC_FTR_READ_GPIO PMAC_FTR_DEF(17)
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/* PMAC_FTR_WRITE_GPIO (NULL, int index, int value)
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*
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* write a GPIO of a mac-io controller of type KeyLargo or Pangea.
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*/
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#define PMAC_FTR_WRITE_GPIO PMAC_FTR_DEF(18)
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/* PMAC_FTR_ENABLE_MPIC
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*
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* Enable the MPIC cell
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*/
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#define PMAC_FTR_ENABLE_MPIC PMAC_FTR_DEF(19)
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/* PMAC_FTR_AACK_DELAY_ENABLE (NULL, int enable, 0)
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*
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* Enable/disable the AACK delay on the northbridge for systems using DFS
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*/
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#define PMAC_FTR_AACK_DELAY_ENABLE PMAC_FTR_DEF(20)
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/* PMAC_FTR_DEVICE_CAN_WAKE
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*
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* Used by video drivers to inform system that they can actually perform
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* wakeup from sleep
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*/
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#define PMAC_FTR_DEVICE_CAN_WAKE PMAC_FTR_DEF(22)
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/* Don't use those directly, they are for the sake of pmac_setup.c */
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extern long pmac_do_feature_call(unsigned int selector, ...);
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extern void pmac_feature_init(void);
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/* Video suspend tweak */
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extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data);
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extern void pmac_call_early_video_resume(void);
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#define PMAC_FTR_DEF(x) ((0x6660000) | (x))
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/* The AGP driver registers itself here */
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extern void pmac_register_agp_pm(struct pci_dev *bridge,
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int (*suspend)(struct pci_dev *bridge),
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int (*resume)(struct pci_dev *bridge));
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/* Those are meant to be used by video drivers to deal with AGP
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* suspend resume properly
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*/
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extern void pmac_suspend_agp_for_card(struct pci_dev *dev);
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extern void pmac_resume_agp_for_card(struct pci_dev *dev);
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/*
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* The part below is for use by macio_asic.c only, do not rely
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* on the data structures or constants below in a normal driver
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*
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*/
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#define MAX_MACIO_CHIPS 2
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|
|
enum {
|
||
|
|
macio_unknown = 0,
|
||
|
|
macio_grand_central,
|
||
|
|
macio_ohare,
|
||
|
|
macio_ohareII,
|
||
|
|
macio_heathrow,
|
||
|
|
macio_gatwick,
|
||
|
|
macio_paddington,
|
||
|
|
macio_keylargo,
|
||
|
|
macio_pangea,
|
||
|
|
macio_intrepid,
|
||
|
|
macio_keylargo2,
|
||
|
|
macio_shasta,
|
||
|
|
};
|
||
|
|
|
||
|
|
struct macio_chip
|
||
|
|
{
|
||
|
|
struct device_node *of_node;
|
||
|
|
int type;
|
||
|
|
const char *name;
|
||
|
|
int rev;
|
||
|
|
volatile u32 __iomem *base;
|
||
|
|
unsigned long flags;
|
||
|
|
|
||
|
|
/* For use by macio_asic PCI driver */
|
||
|
|
struct macio_bus lbus;
|
||
|
|
};
|
||
|
|
|
||
|
|
extern struct macio_chip macio_chips[MAX_MACIO_CHIPS];
|
||
|
|
|
||
|
|
#define MACIO_FLAG_SCCA_ON 0x00000001
|
||
|
|
#define MACIO_FLAG_SCCB_ON 0x00000002
|
||
|
|
#define MACIO_FLAG_SCC_LOCKED 0x00000004
|
||
|
|
#define MACIO_FLAG_AIRPORT_ON 0x00000010
|
||
|
|
#define MACIO_FLAG_FW_SUPPORTED 0x00000020
|
||
|
|
|
||
|
|
extern struct macio_chip* macio_find(struct device_node* child, int type);
|
||
|
|
|
||
|
|
#define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2))
|
||
|
|
#define MACIO_FCR8(macio, r) (((volatile u8 __iomem *)((macio)->base)) + (r))
|
||
|
|
|
||
|
|
#define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r)))
|
||
|
|
#define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v)))
|
||
|
|
#define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v)))
|
||
|
|
#define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
|
||
|
|
#define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r)))
|
||
|
|
#define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v)))
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Those are exported by pmac feature for internal use by arch code
|
||
|
|
* only like the platform function callbacks, do not use directly in drivers
|
||
|
|
*/
|
||
|
|
extern raw_spinlock_t feature_lock;
|
||
|
|
extern struct device_node *uninorth_node;
|
||
|
|
extern u32 __iomem *uninorth_base;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Uninorth reg. access. Note that Uni-N regs are big endian
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define UN_REG(r) (uninorth_base + ((r) >> 2))
|
||
|
|
#define UN_IN(r) (in_be32(UN_REG(r)))
|
||
|
|
#define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
|
||
|
|
#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
|
||
|
|
#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
|
||
|
|
|
||
|
|
/* Uninorth variant:
|
||
|
|
*
|
||
|
|
* 0 = not uninorth
|
||
|
|
* 1 = U1.x or U2.x
|
||
|
|
* 3 = U3
|
||
|
|
* 4 = U4
|
||
|
|
*/
|
||
|
|
extern int pmac_get_uninorth_variant(void);
|
||
|
|
|
||
|
|
#endif /* __ASM_POWERPC_PMAC_FEATURE_H */
|
||
|
|
#endif /* __KERNEL__ */
|