M7350/kernel/arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h

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2024-09-09 08:52:07 +00:00
#ifndef SDHI_SH7372_H
#define SDHI_SH7372_H
#define SDGENCNTA 0xfe40009c
/* The countdown of SDGENCNTA is controlled by
* ZB3D2CLK which runs at 149.5MHz.
* That is 149.5ticks/us. Approximate this as 150ticks/us.
*/
static void udelay(int us)
{
__raw_writel(us * 150, SDGENCNTA);
while(__raw_readl(SDGENCNTA)) ;
}
static void msleep(int ms)
{
udelay(ms * 1000);
}
#endif