211 lines
6.4 KiB
Plaintext
211 lines
6.4 KiB
Plaintext
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "omap36xx.dtsi"
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#include "omap3-evm-common.dtsi"
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/ {
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model = "TI OMAP37XX EVM (TMDSEVM3730)";
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compatible = "ti,omap3-evm-37xx", "ti,omap36xx";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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wl12xx_vmmc: wl12xx_vmmc {
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_gpio>;
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};
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};
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&dss {
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pinctrl-names = "default";
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pinctrl-0 = <
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&dss_dpi_pins1
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&dss_dpi_pins2
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>;
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};
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&omap3_pmx_core {
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dss_dpi_pins1: pinmux_dss_dpi_pins2 {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
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OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
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OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
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OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
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OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
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OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
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OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
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OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
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0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
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0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
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0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
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0x120 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
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0x122 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
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0x124 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
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0x126 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
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>;
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};
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/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
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0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
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0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
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0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
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0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
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0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
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>;
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};
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
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0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
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>;
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};
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wl12xx_gpio: pinmux_wl12xx_gpio {
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pinctrl-single,pins = <
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0x150 (PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
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0x14e (PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
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>;
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};
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smsc911x_pins: pinmux_smsc911x_pins {
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pinctrl-single,pins = <
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0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
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>;
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};
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};
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&omap3_pmx_wkup {
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dss_dpi_pins2: pinmux_dss_dpi_pins1 {
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pinctrl-single,pins = <
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0x0a (PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
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0x0c (PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
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0x10 (PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
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0x12 (PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
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0x14 (PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
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0x16 (PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
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>;
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};
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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};
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&mmc3 {
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status = "disabled";
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};
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&uart1 {
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interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
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};
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&uart2 {
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interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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};
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&uart3 {
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interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x20000000>,
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<5 0 0x2c000000 0x01000000>;
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nand@0,0 {
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linux,mtd-name= "hynix,h8kds0un0mer-4em";
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reg = <0 0 0>;
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "X-Loader";
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reg = <0 0x80000>;
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};
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partition@0x80000 {
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label = "U-Boot";
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reg = <0x80000 0x1c0000>;
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};
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partition@0x1c0000 {
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label = "Environment";
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reg = <0x240000 0x40000>;
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};
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partition@0x280000 {
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label = "Kernel";
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reg = <0x280000 0x500000>;
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};
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partition@0x780000 {
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label = "Filesystem";
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reg = <0x780000 0x1f880000>;
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};
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};
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ethernet@gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&smsc911x_pins>;
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};
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};
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