79 lines
2.8 KiB
Plaintext
79 lines
2.8 KiB
Plaintext
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Qualcomm Technology Inc MSM8939 CPU clock tree
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clock-cpu-8939 is a device that represents the MSM8939 or MSM8952 CPU
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subsystem clock tree. It lists the various power supplies that need to be
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scaled when the clocks are scaled and also other HW specific parameters like
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fmax tables, avs settings table, etc.
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Required properties:
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- compatible: Must be one of "qcom,clock-cpu-8939" or
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"qcom,cpu-clock-8952", "qcom,cpu-clock-gold".
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- reg: Pairs of physical base addresses and region sizes of
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memory mapped registers.
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- reg-names: Names of the bases for the above registers. Expected
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bases are:
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"apcs-c0-rcg-base", "apcs-c1-rcg-base",
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"apcs-cci-rcg-base", "efuse", "efuse1", "efuse2"
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- vdd-c0-supply: The regulator powering the little cluster
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- vdd-c1-supply: The regulator powering the big cluster
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- vdd-cci-supply: The regulator powering the CCI cluster
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- qcom,speedX-bin-vY-ZZZ:
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A table of CPU frequency (Hz) to voltage (corner)
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mapping that represents the max frequency possible
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for each supported voltage level for a CPU. 'X' is
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the speed bin into which the device falls into - a
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bin will have unique frequency-voltage relationships.
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'Y' is the characterization version, implying that
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characterization (deciding what speed bin a device
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falls into) methods and/or encoding may change. The
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values 'X' and 'Y' are read from efuse registers, and
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the right table is picked from multiple possible tables.
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'ZZZ' can be c1, c0 or cci depending on whether the table
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is for the big cluster, little cluster or cci.
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Optional properties:
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- qcom,cpu-pcnoc-vote: Boolean to indicate cpu clocks would need to keep
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active pcnoc vote.
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- qcom,num-cluster: Boolean to indicate cpu clock code is used for single
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cluster.
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Example:
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clock_cpu: qcom,cpu-clock-8939@f9015000 {
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compatible = "qcom,cpu-clock-8939";
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reg = <0xf9015000 0x1000>,
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<0xf9016000 0x1000>,
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<0xf9011000 0x1000>,
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<0xf900d000 0x1000>,
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<0xf900f000 0x1000>,
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<0xf9112000 0x1000>;
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reg-names = "apcs-c0-rcg-base", "apcs-c1-rcg-base",
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"apcs-cci-rcg-base", "efuse", "efuse1",
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"efuse2";
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vdd-c0-supply = <&apc_vreg_corner>;
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vdd-c1-supply = <&apc_vreg_corner>;
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vdd-cci-supply = <&apc_vreg_corner>;
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qcom,speed0-bin-v0-c0 =
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< 0 0>,
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< 384000000 1>,
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< 787200000 2>,
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<1286400000 3>;
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qcom,speed0-bin-v0-c1 =
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< 0 0>,
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< 384000000 1>,
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< 787200000 2>,
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<1785600000 3>;
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qcom,speed0-bin-v0-cci =
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< 0 0>,
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< 150000000 1>,
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< 300000000 2>,
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< 600000000 3>;
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clocks = <&clock_gcc clk_gpll0_ao>,
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<&clock_gcc clk_a53ss_c0_pll>,
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<&clock_gcc clk_gpll0_ao>,
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<&clock_gcc clk_a53ss_c1_pll>,
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<&clock_gcc clk_gpll0_ao>,
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<&clock_gcc clk_a53ss_cci_pll>;
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clock-names = "clk-c0-4", "clk-c0-5",
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"clk-c1-4", "clk-c1-5",
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"clk-cci-4", "clk-cci-5";
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#clock-cells = <1>;
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};
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