2024-09-09 08:52:07 +00:00
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/*
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* Copyright (c) 2010 Broadcom Corporation
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _BRCM_SDH_H_
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#define _BRCM_SDH_H_
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#include <linux/skbuff.h>
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#define SDIO_FUNC_0 0
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#define SDIO_FUNC_1 1
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#define SDIO_FUNC_2 2
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#define SDIOD_FBR_SIZE 0x100
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/* io_en */
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#define SDIO_FUNC_ENABLE_1 0x02
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#define SDIO_FUNC_ENABLE_2 0x04
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/* io_rdys */
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#define SDIO_FUNC_READY_1 0x02
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#define SDIO_FUNC_READY_2 0x04
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/* intr_status */
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#define INTR_STATUS_FUNC1 0x2
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#define INTR_STATUS_FUNC2 0x4
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/* Maximum number of I/O funcs */
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#define SDIOD_MAX_IOFUNCS 7
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/* as of sdiod rev 0, supports 3 functions */
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#define SBSDIO_NUM_FUNCTION 3
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/* function 1 miscellaneous registers */
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/* sprom command and status */
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#define SBSDIO_SPROM_CS 0x10000
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/* sprom info register */
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#define SBSDIO_SPROM_INFO 0x10001
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/* sprom indirect access data byte 0 */
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#define SBSDIO_SPROM_DATA_LOW 0x10002
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/* sprom indirect access data byte 1 */
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#define SBSDIO_SPROM_DATA_HIGH 0x10003
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/* sprom indirect access addr byte 0 */
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#define SBSDIO_SPROM_ADDR_LOW 0x10004
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/* sprom indirect access addr byte 0 */
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#define SBSDIO_SPROM_ADDR_HIGH 0x10005
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/* xtal_pu (gpio) output */
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#define SBSDIO_CHIP_CTRL_DATA 0x10006
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/* xtal_pu (gpio) enable */
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#define SBSDIO_CHIP_CTRL_EN 0x10007
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/* rev < 7, watermark for sdio device */
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#define SBSDIO_WATERMARK 0x10008
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/* control busy signal generation */
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#define SBSDIO_DEVICE_CTL 0x10009
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/* SB Address Window Low (b15) */
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#define SBSDIO_FUNC1_SBADDRLOW 0x1000A
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/* SB Address Window Mid (b23:b16) */
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#define SBSDIO_FUNC1_SBADDRMID 0x1000B
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/* SB Address Window High (b31:b24) */
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#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
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/* Frame Control (frame term/abort) */
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#define SBSDIO_FUNC1_FRAMECTRL 0x1000D
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/* ChipClockCSR (ALP/HT ctl/status) */
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#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
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/* SdioPullUp (on cmd, d0-d2) */
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#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
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/* Write Frame Byte Count Low */
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#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
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/* Write Frame Byte Count High */
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#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
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/* Read Frame Byte Count Low */
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#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
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/* Read Frame Byte Count High */
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#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
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#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
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#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
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/* function 1 OCP space */
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/* sb offset addr is <= 15 bits, 32k */
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#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
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#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
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/* with b15, maps to 32-bit SB access */
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#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
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/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
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#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
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#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
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#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
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/* Address bits from SBADDR regs */
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#define SBSDIO_SBWINDOW_MASK 0xffff8000
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#define SDIOH_READ 0 /* Read request */
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#define SDIOH_WRITE 1 /* Write request */
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#define SDIOH_DATA_FIX 0 /* Fixed addressing */
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#define SDIOH_DATA_INC 1 /* Incremental addressing */
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/* internal return code */
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#define SUCCESS 0
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#define ERROR 1
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struct brcmf_sdreg {
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int func;
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int offset;
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int value;
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};
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struct brcmf_sdio_dev {
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struct sdio_func *func[SDIO_MAX_FUNCS];
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u8 num_funcs; /* Supported funcs on client */
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u32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
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u32 sbwad; /* Save backplane window address */
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bool regfail; /* status of last reg_r/w call */
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void *bus;
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atomic_t suspend; /* suspend flag */
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wait_queue_head_t request_byte_wait;
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wait_queue_head_t request_word_wait;
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wait_queue_head_t request_packet_wait;
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wait_queue_head_t request_buffer_wait;
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};
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2024-09-09 08:57:42 +00:00
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/* Register/deregister device interrupt handler. */
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extern int
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brcmf_sdcard_intr_reg(struct brcmf_sdio_dev *sdiodev);
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2024-09-09 08:57:42 +00:00
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extern int brcmf_sdcard_intr_dereg(struct brcmf_sdio_dev *sdiodev);
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/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface).
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* fn: function number
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* addr: unmodified SDIO-space address
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* data: data byte to write
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* err: pointer to error code (or NULL)
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*/
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extern u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint func,
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u32 addr, int *err);
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extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint func,
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u32 addr, u8 data, int *err);
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/* Synchronous access to device (client) core registers via CMD53 to F1.
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* addr: backplane address (i.e. >= regsva from attach)
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* size: register width in bytes (2 or 4)
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* data: data for register write
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*/
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extern u32
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brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size);
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extern u32
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brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,
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u32 data);
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/* Indicate if last reg read/write failed */
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extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev);
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/* Buffer transfer to/from device (client) core via cmd53.
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* fn: function number
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* addr: backplane address (i.e. >= regsva from attach)
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* flags: backplane width, address increment, sync/async
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* buf: pointer to memory data buffer
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* nbytes: number of bytes to transfer to/from buf
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* pkt: pointer to packet associated with buf (if any)
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* complete: callback function for command completion (async only)
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* handle: handle for completion callback (first arg in callback)
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* Returns 0 or error code.
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* NOTE: Async operation is not currently supported.
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*/
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extern int
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brcmf_sdcard_send_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
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uint flags, u8 *buf, uint nbytes, struct sk_buff *pkt);
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extern int
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brcmf_sdcard_recv_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
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uint flags, u8 *buf, uint nbytes, struct sk_buff *pkt);
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/* Flags bits */
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/* Four-byte target (backplane) width (vs. two-byte) */
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#define SDIO_REQ_4BYTE 0x1
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/* Fixed address (FIFO) (vs. incrementing address) */
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#define SDIO_REQ_FIXED 0x2
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/* Async request (vs. sync request) */
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#define SDIO_REQ_ASYNC 0x4
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/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only).
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* rw: read or write (0/1)
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* addr: direct SDIO address
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* buf: pointer to memory data buffer
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* nbytes: number of bytes to transfer to/from buf
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* Returns 0 or error code.
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*/
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extern int brcmf_sdcard_rwdata(struct brcmf_sdio_dev *sdiodev, uint rw,
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u32 addr, u8 *buf, uint nbytes);
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/* Issue an abort to the specified function */
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extern int brcmf_sdcard_abort(struct brcmf_sdio_dev *sdiodev, uint fn);
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/* platform specific/high level functions */
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extern int brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev);
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extern int brcmf_sdio_remove(struct brcmf_sdio_dev *sdiodev);
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extern int brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev,
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u32 address);
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/* attach, return handler on success, NULL if failed.
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* The handler shall be provided by all subsequent calls. No local cache
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* cfghdl points to the starting address of pci device mapped memory
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*/
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extern int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev);
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extern void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev);
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/* read or write one byte using cmd52 */
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extern int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw,
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uint fnc, uint addr, u8 *byte);
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/* read or write 2/4 bytes using cmd53 */
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extern int
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brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
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uint rw, uint fnc, uint addr,
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u32 *word, uint nbyte);
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/* read or write any buffer using cmd53 */
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extern int
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brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,
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uint fix_inc, uint rw, uint fnc_num,
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u32 addr, uint regwidth,
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u32 buflen, u8 *buffer, struct sk_buff *pkt);
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/* Watchdog timer interface for pm ops */
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extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev *sdiodev,
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bool enable);
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extern void *brcmf_sdbrcm_probe(u16 bus_no, u16 slot, u16 func, uint bustype,
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u32 regsva, struct brcmf_sdio_dev *sdiodev);
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extern void brcmf_sdbrcm_disconnect(void *ptr);
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extern void brcmf_sdbrcm_isr(void *arg);
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#endif /* _BRCM_SDH_H_ */
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